+ }*/\r
+ {\r
+ struct vga_mode_params cm;\r
+ vga_read_crtc_mode(&cm);\r
+\r
+// 0x5f00, /* Horizontal total */\r
+// 0x4f01, /* horizontal display enable end */\r
+// 0x5002, /* Start horizontal blanking */\r
+// 0x8203, /* End horizontal blanking */\r
+// 0x5404, /* Start horizontal retrace */\r
+// 0x8005, /* End horizontal retrace */\r
+// 0x0d06, /* vertical total */\r
+// 0x3e07, /* overflow (bit 8 of vertical counts) */\r
+// 0x4109, /* cell height (2 to double-scan */\r
+// 0xea10, /* v sync start */\r
+// 0xac11, /* v sync end and protect cr0-cr7 */\r
+// 0xdf12, /* vertical displayed */\r
+// 0x2813, /* offset/logical width */\r
+// 0x0014, /* turn off dword mode */\r
+// 0xe715, /* v blank start */\r
+// 0x0616, /* v blank end */\r
+// 0xe317 /* turn on byte mode */\r
+\r
+ // 320x240 mode 60Hz\r
+ cm.horizontal_total=0x5f + 5; /* CRTC[0] -5 */\r
+ cm.horizontal_display_end=0x4f + 1; /* CRTC[1] -1 */\r
+ cm.horizontal_blank_start=0x50 + 1; /* CRTC[2] */\r
+ cm.horizontal_blank_end=0x82 + 1; /* CRTC[3] bit 0-4 & CRTC[5] bit 7 */\r
+ cm.horizontal_start_retrace=0x54;/* CRTC[4] */\r
+ cm.horizontal_end_retrace=0x80; /* CRTC[5] bit 0-4 */\r
+ //cm.horizontal_start_delay_after_total=0x3e; /* CRTC[3] bit 5-6 */\r
+ //cm.horizontal_start_delay_after_retrace=0x41; /* CRTC[5] bit 5-6 */\r
+ cm.vertical_total = 0x20D + 2;\r
+ cm.vertical_start_retrace = 0x1EA;\r
+ cm.vertical_end_retrace = 0x1EC;\r
+ cm.vertical_display_end = 480;\r
+ cm.vertical_blank_start = 0x1E7 + 1;\r
+ cm.vertical_blank_end = 0x206 + 1;\r
+ cm.clock_select = 0; /* misc register = 0xE3 25MHz */\r
+ cm.vsync_neg = 1;\r
+ cm.hsync_neg = 1;\r
+\r
+ vga_write_crtc_mode(&cm,0);\r