X-Git-Url: http://4ch.mooo.com/gitweb/?a=blobdiff_plain;ds=sidebyside;f=src%2Flib%2Fmodex16.c;h=42d4f6c8be8bd193845ae388e26e42403ba6cd5d;hb=183ba0acda6854d524cf937c2df59cab90a5ebac;hp=1328ac59caaa3077136aba5b817587258cb2907e;hpb=e93d8e28f3905db257e06e2aeab219827475248a;p=16.git

diff --git a/src/lib/modex16.c b/src/lib/modex16.c
index 1328ac59..42d4f6c8 100755
--- a/src/lib/modex16.c
+++ b/src/lib/modex16.c
@@ -62,11 +62,7 @@ void VGAmodeX(sword vq, boolean cmem, global_game_variables_t *gv)
 static void
 vgaSetMode(byte mode)
 {
-  union REGS regs;
-
-  regs.h.ah = SET_MODE;
-  regs.h.al = mode;
-  int86(VIDEO_INT, &regs, &regs);
+  int10_setmode(mode);
 }
 
 //---------------------------------------------------
@@ -74,25 +70,24 @@ vgaSetMode(byte mode)
 // Use the bios to get the current video mode
 //
 
-long
+byte/*FIXME: why long? "long" is 32-bit datatype, VGA modes are 8-bit numbers. */
 vgaGetMode()
 {
-    union REGS rg;
-
-    rg.h.ah = 0x0f;
-    int86(VIDEO_INT, &rg, &rg);
-
-    return rg.h.al;
+    return int10_getmode();
 }
 
 /* -========================= Entry  Points ==========================- */
 void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
 {
 	word i;
-	dword far*ptr=(dword far*)VGA;      /* used for faster screen clearing */
+	dword far*ptr=(dword far*)vga_state.vga_graphics_ram;//VGA;      /* used for faster screen clearing */
+	struct vga_mode_params cm;
 	int CRTParmCount;
-	/* common mode X initiation stuff~ */
-	modexsetBaseXMode();
+
+	vgaSetMode(VGA_256_COLOR_MODE);
+	vga_enable_256color_modex();
+	update_state_from_vga();
+	vga_read_crtc_mode(&cm);
 
 	switch(vq)
 	{
@@ -102,32 +97,6 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
 			gv->video.page[0].sw=vga_state.vga_width = 320; // VGA lib currently does not update this
 			gv->video.page[0].sh=vga_state.vga_height = 240; // VGA lib currently does not update this
 
-			/* send the CRTParms */
-			/*for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_320x240regs[i]);
-			}*/
-			{
-			struct vga_mode_params cm;
-			vga_read_crtc_mode(&cm);
-
-// 	0x5f00,		/* Horizontal total */
-// 	0x4f01,		/* horizontal display enable end */
-// 	0x5002,		/* Start horizontal blanking */
-// 	0x8203,		/* End horizontal blanking */
-// 	0x5404,		/* Start horizontal retrace */
-// 	0x8005,		/* End horizontal retrace */
-// 	0x0d06,		 /* vertical total */
-// 	0x3e07,		 /* overflow (bit 8 of vertical counts) */
-// 	0x4109,		 /* cell height (2 to double-scan */
-// 	0xea10,		 /* v sync start */
-// 	0xac11,		 /* v sync end and protect cr0-cr7 */
-// 	0xdf12,		 /* vertical displayed */
-// 	0x2813,		/* offset/logical width */
-// 	0x0014,		 /* turn off dword mode */
-// 	0xe715,		 /* v blank start */
-// 	0x0616,		 /* v blank end */
-// 	0xe317		  /* turn on byte mode */
-
 			// 320x240 mode 60Hz
 			cm.horizontal_total=0x5f + 5; /* CRTC[0]             -5 */
 			cm.horizontal_display_end=0x4f + 1; /* CRTC[1]       -1 */
@@ -143,65 +112,31 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
 			cm.vertical_display_end = 480;
 			cm.vertical_blank_start = 0x1E7 + 1;
 			cm.vertical_blank_end = 0x206 + 1;
-
-			vga_write_crtc_mode(&cm,0);
-			}
-		break;
-		case 2:
-			CRTParmCount = sizeof(ModeX_160x120regs) / sizeof(ModeX_160x120regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=120;
-			gv->video.page[0].sh=160;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_160x120regs[i]);
-			}
-		break;
-		case 3:
-			CRTParmCount = sizeof(ModeX_320x200regs) / sizeof(ModeX_320x200regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=320;
-			gv->video.page[0].sh=200;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_320x200regs[i]);
-			}
-		break;
-		case 4:
-			CRTParmCount = sizeof(ModeX_192x144regs) / sizeof(ModeX_192x144regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=192;
-			gv->video.page[0].sh=144;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_192x144regs[i]);
-			}
-		break;
-		case 5:
-			CRTParmCount = sizeof(ModeX_256x192regs) / sizeof(ModeX_256x192regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=256;
-			gv->video.page[0].sh=192;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_256x192regs[i]);
-			}
-		break;
+			cm.clock_select = 0; /* misc register = 0xE3  25MHz */
+			cm.vsync_neg = 1;
+			cm.hsync_neg = 1;
+			break;
+		case 2: // TODO: 160x120 according to ModeX_160x120regs
+			return;
+		case 3: // TODO: 160x120 according to ModeX_320x200regs
+			return;
+		case 4: // TODO: 160x120 according to ModeX_192x144regs
+			return;
+		case 5: // TODO: 160x120 according to ModeX_256x192regs
+			return;
+		default:
+			return;
 	}
 
+	vga_write_crtc_mode(&cm,0);
+
 	/* clear video memory */
 	switch (cmem)
 	{
 		case 1:
 		/* clear video memory */
-		outpw(SC_INDEX, 0x0f02);
-		for(i=0; i<0x8000; i++) {
-			ptr[i] = 0x0000;
-		}
+		vga_write_sequencer(2/*map mask register*/,0xf/*all 4 planes*/);
+		for(i=0; i<0x8000; i++) ptr[i] = 0x0000;
 		break;
 	}
 	gv->video.page[0].tilesw = gv->video.page[0].sw/TILEWH;
@@ -218,46 +153,13 @@ modexLeave() {
 	vgaSetMode(TEXT_MODE);
 }
 
-//    setBaseXMode() does the initialization to make the VGA ready to
-//    accept any combination of configuration register settings.  This
-//    involves enabling writes to index 0 to 7 of the CRT controller (port
-//    0x3D4), by clearing the most significant bit (bit 7) of index 0x11.
-void
-modexsetBaseXMode()
-{
-	/* TODO save current video mode and palette */
-	vgaSetMode(VGA_256_COLOR_MODE);
-
-	vga_enable_256color_modex();
-
-	/* disable chain4 mode */
-	//outpw(SC_INDEX, 0x0604);
-
-	/* synchronous reset while setting Misc Output */
-	//outpw(SC_INDEX, 0x0100);
-
-	/* select 25 MHz dot clock & 60 Hz scanning rate */
-	outp(MISC_OUTPUT, 0xe3);
-
-	/* undo reset (restart sequencer) */
-	//outpw(SC_INDEX, 0x0300);
-
-	/* reprogram the CRT controller */
-	outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */
-//	temp = inp(CRTC_DATA) & 0x7F;
-//	outp(CRTC_INDEX, 0x11);
-	outp(CRTC_DATA, 0x7f);  /* get current write protect on varios regs */
-//	outp(CRTC_DATA, temp);  /* get current write protect on varios regs */
-	update_state_from_vga();
-}
-
 page_t
 modexDefaultPage(page_t *p)
 {
     page_t page;
 
     /* default page values */
-    page.data = VGA;
+    page.data = vga_state.vga_graphics_ram;//VGA;
     page.dx = 0;
     page.dy = 0;
 	page.sw = p->sw;