X-Git-Url: http://4ch.mooo.com/gitweb/?a=blobdiff_plain;f=src%2Flib%2Fmodex16.c;h=6a4fbe1c5f819bfa01246b98a5d9438435143ad3;hb=9f7214fd9c7455cdde58349d0be24c4bd0343ab5;hp=cb4c53123337f7fffa4e57b33c392c25571483d5;hpb=8e9c24c25f7496303be4d3e8e3c6aac38a652e99;p=16.git

diff --git a/src/lib/modex16.c b/src/lib/modex16.c
index cb4c5312..6a4fbe1c 100755
--- a/src/lib/modex16.c
+++ b/src/lib/modex16.c
@@ -62,11 +62,7 @@ void VGAmodeX(sword vq, boolean cmem, global_game_variables_t *gv)
 static void
 vgaSetMode(byte mode)
 {
-  union REGS regs;
-
-  regs.h.ah = SET_MODE;
-  regs.h.al = mode;
-  int86(VIDEO_INT, &regs, &regs);
+  int10_setmode(mode);
 }
 
 //---------------------------------------------------
@@ -74,27 +70,24 @@ vgaSetMode(byte mode)
 // Use the bios to get the current video mode
 //
 
-long
+byte/*FIXME: why long? "long" is 32-bit datatype, VGA modes are 8-bit numbers. */
 vgaGetMode()
 {
-    union REGS rg;
-
-    rg.h.ah = 0x0f;
-    int86(VIDEO_INT, &rg, &rg);
-
-    return rg.h.al;
+    return int10_getmode();
 }
 
 /* -========================= Entry  Points ==========================- */
 void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
 {
 	word i;
-	dword far*ptr=(dword far*)VGA;      /* used for faster screen clearing */
+	dword far*ptr=(dword far*)vga_state.vga_graphics_ram;//VGA;      /* used for faster screen clearing */
+	struct vga_mode_params cm;
 	int CRTParmCount;
-	/* common mode X initiation stuff~ */
-	modexsetBaseXMode(gv->video.page);
-	vga_enable_256color_modex(); // VGA mode X
+
+	vgaSetMode(VGA_256_COLOR_MODE);
+	vga_enable_256color_modex();
 	update_state_from_vga();
+	vga_read_crtc_mode(&cm);
 
 	switch(vq)
 	{
@@ -104,80 +97,50 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
 			gv->video.page[0].sw=vga_state.vga_width = 320; // VGA lib currently does not update this
 			gv->video.page[0].sh=vga_state.vga_height = 240; // VGA lib currently does not update this
 
-			/* send the CRTParms */
-			/*for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_320x240regs[i]);
-			}*/
-			{
-			struct vga_mode_params cm;
-			vga_read_crtc_mode(&cm);
-
 			// 320x240 mode 60Hz
-			cm.vertical_total = 525;
+			cm.horizontal_total=0x5f + 5; /* CRTC[0]             -5 */
+			cm.horizontal_display_end=0x4f + 1; /* CRTC[1]       -1 */
+			cm.horizontal_blank_start=0x50 + 1; /* CRTC[2] */
+			cm.horizontal_blank_end=0x82 + 1;   /* CRTC[3] bit 0-4 & CRTC[5] bit 7 */
+			cm.horizontal_start_retrace=0x54;/* CRTC[4] */
+			cm.horizontal_end_retrace=0x80;	/* CRTC[5] bit 0-4 */
+			//cm.horizontal_start_delay_after_total=0x3e; /* CRTC[3] bit 5-6 */
+			//cm.horizontal_start_delay_after_retrace=0x41; /* CRTC[5] bit 5-6 */
+			cm.vertical_total = 0x20D + 2;
 			cm.vertical_start_retrace = 0x1EA;
 			cm.vertical_end_retrace = 0x1EC;
 			cm.vertical_display_end = 480;
-			cm.vertical_blank_start = 489;
-			cm.vertical_blank_end = 517;
-
-			vga_write_crtc_mode(&cm,0);
-			}
-		break;
-		case 2:
-			CRTParmCount = sizeof(ModeX_160x120regs) / sizeof(ModeX_160x120regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=120;
-			gv->video.page[0].sh=160;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_160x120regs[i]);
-			}
-		break;
-		case 3:
-			CRTParmCount = sizeof(ModeX_320x200regs) / sizeof(ModeX_320x200regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=320;
-			gv->video.page[0].sh=200;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_320x200regs[i]);
-			}
-		break;
-		case 4:
-			CRTParmCount = sizeof(ModeX_192x144regs) / sizeof(ModeX_192x144regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=192;
-			gv->video.page[0].sh=144;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_192x144regs[i]);
-			}
-		break;
-		case 5:
-			CRTParmCount = sizeof(ModeX_256x192regs) / sizeof(ModeX_256x192regs[0]);
-			/* width and height */
-			gv->video.page[0].sw=256;
-			gv->video.page[0].sh=192;
-
-			/* send the CRTParms */
-			for(i=0; i<CRTParmCount; i++) {
-				outpw(CRTC_INDEX, ModeX_256x192regs[i]);
-			}
-		break;
+			cm.vertical_blank_start = 0x1E7 + 1;
+			cm.vertical_blank_end = 0x206 + 1;
+			cm.clock_select = 0; /* misc register = 0xE3  25MHz */
+			cm.vsync_neg = 1;
+			cm.hsync_neg = 1;
+
+			cm.scanline_div2=1;	/* CRTC[0x17] bit 2 */
+			cm.scan_double=0;		/* CRTC[0x09] bit 7 */
+			cm.max_scanline=4;		/* CRTC[0x09] bit 4-0 */
+			break;
+		case 2: // TODO: 160x120 according to ModeX_160x120regs
+			return;
+		case 3: // TODO: 160x120 according to ModeX_320x200regs
+			return;
+		case 4: // TODO: 160x120 according to ModeX_192x144regs
+			return;
+		case 5: // TODO: 160x120 according to ModeX_256x192regs
+			return;
+		default:
+			return;
 	}
 
+	vga_write_crtc_mode(&cm,0);
+
 	/* clear video memory */
 	switch (cmem)
 	{
 		case 1:
 		/* clear video memory */
-		outpw(SC_INDEX, 0x0f02);
-		for(i=0; i<0x8000; i++) {
-			ptr[i] = 0x0000;
-		}
+		vga_write_sequencer(2/*map mask register*/,0xf/*all 4 planes*/);
+		for(i=0; i<0x8000; i++) ptr[i] = 0x0000;
 		break;
 	}
 	gv->video.page[0].tilesw = gv->video.page[0].sw/TILEWH;
@@ -190,39 +153,8 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
 
 void
 modexLeave() {
-    /* TODO restore original mode and palette */
-    vgaSetMode(TEXT_MODE);
-}
-
-//    setBaseXMode() does the initialization to make the VGA ready to
-//    accept any combination of configuration register settings.  This
-//    involves enabling writes to index 0 to 7 of the CRT controller (port
-//    0x3D4), by clearing the most significant bit (bit 7) of index 0x11.
-void
-modexsetBaseXMode(page_t *page)
-{
-	word temp;
-	/* TODO save current video mode and palette */
-	vgaSetMode(VGA_256_COLOR_MODE);
-
-	/* disable chain4 mode */
-	outpw(SC_INDEX, 0x0604);
-
-	/* synchronous reset while setting Misc Output */
-	outpw(SC_INDEX, 0x0100);
-
-	/* select 25 MHz dot clock & 60 Hz scanning rate */
-	outp(MISC_OUTPUT, 0xe3);
-
-	/* undo reset (restart sequencer) */
-	outpw(SC_INDEX, 0x0300);
-
-	/* reprogram the CRT controller */
-	outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */
-//	temp = inp(CRTC_DATA) & 0x7F;
-//	outp(CRTC_INDEX, 0x11);
-	outp(CRTC_DATA, 0x7f);  /* get current write protect on varios regs */
-//	outp(CRTC_DATA, temp);  /* get current write protect on varios regs */
+	/* TODO restore original mode and palette */
+	vgaSetMode(TEXT_MODE);
 }
 
 page_t
@@ -231,7 +163,7 @@ modexDefaultPage(page_t *p)
     page_t page;
 
     /* default page values */
-    page.data = VGA;
+    page.data = vga_state.vga_graphics_ram;//VGA;
     page.dx = 0;
     page.dy = 0;
 	page.sw = p->sw;
@@ -617,7 +549,8 @@ modexPalUpdate(bitmap_t *bmp, word *i, word qp, word aqoffset)
 	static word a[PAL_SIZE];	//palette array of change values!
 	word z=0, aq=0, aa=0, pp=0;
 
-	modexWaitBorder();
+	//modexWaitBorder();
+	vga_wait_for_vsync();
 	if((*i)==0)
 	{
 		memset(a, -1, sizeof(a));
@@ -667,7 +600,8 @@ modexPalUpdate(bitmap_t *bmp, word *i, word qp, word aqoffset)
 		//if(qp>0) printf("qp=%d\n", qp);
 		//if(qp>0) printf("					     (*i)=%d\n", (*i)/3);
 	}
-	modexWaitBorder();	  /* waits one retrace -- less flicker */
+	//modexWaitBorder();	  /* waits one retrace -- less flicker */
+	vga_wait_for_vsync();
 	if((*i)>=PAL_SIZE/2 && w==0)
 	{
 		for(; (*i)<PAL_SIZE; (*i)++)
@@ -706,7 +640,7 @@ printf("\nqqqqqqqq\n\n");
 		pp = q;
 		//printf("1(*i)=%02d\n", (*i)/3);
 		//printf("1z=%02d\n", z/3);
-		chkcolor(bmp, &q, &a, &aa, &z, i);
+		modexchkcolor(bmp, &q, &a, &aa, &z, i);
 		//printf("2(*i)=%02d\n", (*i)/3);
 		//printf("2z=%02d\n", z/3);
 		aq=0;
@@ -778,13 +712,15 @@ void
 modexPalUpdate1(byte *p)
 {
 	int i;
-	modexWaitBorder();
+	//modexWaitBorder();
+	vga_wait_for_vsync();
 	outp(PAL_WRITE_REG, 0);  /* start at the beginning of palette */
 	for(i=0; i<PAL_SIZE/2; i++)
 	{
 		outp(PAL_DATA_REG, p[i]);
 	}
-	modexWaitBorder();	  /* waits one retrace -- less flicker */
+	//modexWaitBorder();	  /* waits one retrace -- less flicker */
+	vga_wait_for_vsync();
 	for(; i<PAL_SIZE; i++)
 	{
 		outp(PAL_DATA_REG, p[(i)]);
@@ -795,13 +731,15 @@ void
 modexPalUpdate0(byte *p)
 {
 	int i;
-	modexWaitBorder();
+	//modexWaitBorder();
+	vga_wait_for_vsync();
 	outp(PAL_WRITE_REG, 0);  /* start at the beginning of palette */
 	for(i=0; i<PAL_SIZE/2; i++)
 	{
 		outp(PAL_DATA_REG, rand());
 	}
-	modexWaitBorder();	  /* waits one retrace -- less flicker */
+	//modexWaitBorder();	  /* waits one retrace -- less flicker */
+	vga_wait_for_vsync();
 	for(; i<PAL_SIZE; i++)
 	{
 		outp(PAL_DATA_REG, rand());
@@ -811,14 +749,15 @@ modexPalUpdate0(byte *p)
 void
 modexPalOverscan(byte *p, word col)
 {
-	modexWaitBorder();
+	//modexWaitBorder();
+	vga_wait_for_vsync();
 	outp(PAL_WRITE_REG, 0);  /* start at the beginning of palette */
 	outp(PAL_DATA_REG, col);
 }
 
 //color checker~
 //i want to make another vesion that checks the palette when the palette is being appened~
-void chkcolor(bitmap_t *bmp, word *q, word *a, word *aa, word *z, word *i/*, word *offset*/)
+void modexchkcolor(bitmap_t *bmp, word *q, word *a, word *aa, word *z, word *i/*, word *offset*/)
 {
 		byte *pal;
 		word zz=0;
@@ -1071,7 +1010,7 @@ void modexprintbig(page_t *page, word x, word y, word t, word col, word bgcol, c
 }
 
 /* palette dump on display! */
-void pdump(page_t *pee)
+void modexpdump(page_t *pee)
 {
 	int mult=(QUADWH);
 	int palq=(mult)*TILEWH;
@@ -1091,7 +1030,7 @@ void pdump(page_t *pee)
 //		 the Virtual screen.											 //
 //																		 //
 /////////////////////////////////////////////////////////////////////////////
-void cls(page_t *page, byte color, byte *Where)
+void modexcls(page_t *page, byte color, byte *Where)
 {
 	//modexClearRegion(page, 0, 0, page->width, page->height, color);
 	/* set map mask to all 4 planes */
@@ -1100,13 +1039,40 @@ void cls(page_t *page, byte color, byte *Where)
 	_fmemset(Where, color, page->width*(page->height)/4);
 }
 
-void
+/*void
 modexWaitBorder() {
     while(inp(INPUT_STATUS_1)  & 8)  {
-	/* spin */
+	// spin
     }
 
     while(!(inp(INPUT_STATUS_1)  & 8))  {
-	/* spin */
+	// spin
     }
+}*/
+
+void bios_cls() {
+	VGA_ALPHA_PTR ap;
+	VGA_RAM_PTR rp;
+	unsigned char m;
+
+	m = int10_getmode();
+	if ((rp=vga_state.vga_graphics_ram) != NULL && !(m <= 3 || m == 7)) {
+		unsigned int i,im;
+
+		im = (FP_SEG(vga_state.vga_graphics_ram_fence) - FP_SEG(vga_state.vga_graphics_ram));
+		if (im > 0xFFE) im = 0xFFE;
+		im <<= 4;
+		for (i=0;i < im;i++) vga_state.vga_graphics_ram[i] = 0;
+	}
+	else if ((ap=vga_state.vga_alpha_ram) != NULL) {
+		unsigned int i,im;
+
+		im = (FP_SEG(vga_state.vga_alpha_ram_fence) - FP_SEG(vga_state.vga_alpha_ram));
+		if (im > 0x7FE) im = 0x7FE;
+		im <<= 4 - 1; /* because ptr is type uint16_t */
+		for (i=0;i < im;i++) vga_state.vga_alpha_ram[i] = 0x0720;
+	}
+	else {
+		printf("WARNING: bios cls no ptr\n");
+	}
 }