From: sparky4 Date: Fri, 3 Jun 2016 17:28:07 +0000 (-0500) Subject: test.exe shows that the overscan is showing up where it should not thus end horizonta... X-Git-Url: http://4ch.mooo.com/gitweb/?a=commitdiff_plain;h=d5a4d9aafbf32d7224dbe7f284a7f7ee37b89f89;p=16.git test.exe shows that the overscan is showing up where it should not thus end horizontal display is incorrect --- diff --git a/TEST.L16 b/TEST.L16 new file mode 100755 index 00000000..0cad3f63 --- /dev/null +++ b/TEST.L16 @@ -0,0 +1,9 @@ +WARNING: Failed to initialize DEBUG output +Project 16 test.exe. This is just a test file! +version Jun 3 2016 12:00:56 +video memory remaining: 65535 +page [0]=(a000:0000) size=23936 sw=320 sh=240 width=352 height=272 + [1]=(a000:5d80) size=23936 sw=320 sh=240 width=352 height=272 + [2]=(a000:bb00) size=1024 sw=64 sh=64 width=64 height=64 + [3]=(a000:bf00) size=16640 sw=320 sh=208 width=320 height=208 +tx=2 ty=0 player.d=2 diff --git a/pcx2vrl b/pcx2vrl index 3d9ac6e6..bd947e55 100755 Binary files a/pcx2vrl and b/pcx2vrl differ diff --git a/pcxsscut b/pcxsscut index d743ac3b..1deec74d 100755 Binary files a/pcxsscut and b/pcxsscut differ diff --git a/src/lib/modex16.c b/src/lib/modex16.c index 157e5fc4..62f5c4ef 100755 --- a/src/lib/modex16.c +++ b/src/lib/modex16.c @@ -92,11 +92,11 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv) vga_enable_256color_modex(); update_state_from_vga(); - vga_read_crtc_mode(&cm); + vga_read_crtc_mode_(&cm); /* reprogram the CRT controller */ - outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */ - outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */ + //outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */ + //outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */ switch(vq) { @@ -119,7 +119,7 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv) cm.horizontal_total=0x5f + 5; /* CRTC[0] -5 */ cm.horizontal_display_end=0x4f + 1; /* CRTC[1] -1 */ cm.horizontal_blank_start=0x50 + 1; /* CRTC[2] */ - //cm.horizontal_blank_end=0x82 + 1; /* CRTC[3] bit 0-4 & CRTC[5] bit 7 */ + //cm.horizontal_blank_end=0x82 + 1; /* CRTC[3] bit 0-4 & CRTC[5] bit 7 *///skewing ^^; cm.horizontal_start_retrace=0x54;/* CRTC[4] */ cm.horizontal_end_retrace=0x80; /* CRTC[5] bit 0-4 */ //cm.horizontal_start_delay_after_total=0x3e; /* CRTC[3] bit 5-6 */ @@ -837,7 +837,7 @@ modexPalUpdate0(byte *p) } void -modexPalOverscan(byte *p, word col) +modexPalOverscan(word col) { //modexWaitBorder(); vga_wait_for_vsync(); @@ -1178,3 +1178,152 @@ void modexprintmeminfo(video_t *v) printf("\n"); } } + +void vga_write_crtc_mode_(struct vga_mode_params *p,unsigned int flags) { + unsigned char c,c2,syncreset=0; + + if (!(vga_state.vga_flags & VGA_IS_VGA)) + return; + + /* sync disable unless told not to */ + if (!(flags & VGA_WRITE_CRTC_MODE_NO_CLEAR_SYNC)) { + c = vga_read_CRTC(0x17); + vga_write_CRTC(0x17,c&0x7F); + } + + c = inp(0x3CC); /* misc out reg */ + /* if changing the clock select bits then we need to do a reset of the sequencer */ + if (p->clock_select != ((c >> 2) & 3)) syncreset=1; + /* proceed to change bits */ + c &= ~((3 << 2) | (1 << 6) | (1 << 7)); + c |= (p->clock_select&3) << 2; + c |= p->hsync_neg << 6; + c |= p->vsync_neg << 7; + if (syncreset) vga_write_sequencer(0,0x01/*SR=0 AR=1 start synchronous reset*/); + outp(0x3C2,c); /* misc out */ + if (syncreset) vga_write_sequencer(0,0x03/*SR=1 AR=1 restart sequencer*/); + + vga_write_sequencer(1, + (p->shift_load_rate << 2) | + (p->shift4_enable << 4) | + ((p->clock9 ^ 1) << 0) | + (p->clock_div2 << 3)); + + c = 0; /* use 'c' as overflow register */ + c2 = vga_read_CRTC(0x09); /* read max scan line */ + c2 &= ~(1 << 5); /* mask out start vertical blank bit 9 */ + vga_write_CRTC(0x11, /* NTS: we leave bit 7 (protect) == 0 so we can program regs 0-7 in this routine */ + (((p->refresh_cycles_per_scanline == 5) ? 1 : 0) << 6) | + (p->vertical_end_retrace & 0xF)); + vga_write_CRTC(0x06,(p->vertical_total - 2)); + c |= (((p->vertical_total - 2) >> 8) & 1) << 0; + c |= (((p->vertical_total - 2) >> 9) & 1) << 5; + vga_write_CRTC(0x10,p->vertical_start_retrace); + c |= ((p->vertical_start_retrace >> 8) & 1) << 2; + c |= ((p->vertical_start_retrace >> 9) & 1) << 7; + vga_write_CRTC(0x12,p->vertical_display_end - 1); + c |= (((p->vertical_display_end - 1) >> 8) & 1) << 1; + c |= (((p->vertical_display_end - 1) >> 9) & 1) << 6; + vga_write_CRTC(0x15,p->vertical_blank_start - 1); + c |= (((p->vertical_blank_start - 1) >> 8) & 1) << 3; + c2|= (((p->vertical_blank_start - 1) >> 9) & 1) << 5; + + /* NTS: this field is 7 bits wide but "Some SVGA chipsets use all 8" as VGADOC says. */ + /* writing it in this way resolves the partial/full screen blanking problems with Intel 855/915/945 chipsets */ + vga_write_CRTC(0x16,p->vertical_blank_end - 1); + + vga_write_CRTC(0x14, /* NTS we write "underline location == 0" */ + (p->dword_mode << 6) | + (p->inc_mem_addr_only_every_4th << 5)); + vga_write_CRTC(0x07,c); /* overflow reg */ + + c2 &= ~(0x9F); /* mask out SD + Max scanline */ + c2 |= (p->scan_double << 7); + c2 |= (p->max_scanline - 1) & 0x1F; + vga_write_CRTC(0x09,c2); + vga_write_CRTC(0x13,p->offset); + vga_write_CRTC(0,(p->horizontal_total - 5)); + vga_write_CRTC(1,(p->horizontal_display_end - 1)); + vga_write_CRTC(2,p->horizontal_blank_start - 1); + vga_write_CRTC(3,((p->horizontal_blank_end - 1) & 0x1F) | (p->horizontal_start_delay_after_total << 5) | 0x80); + vga_write_CRTC(4,p->horizontal_start_retrace); + vga_write_CRTC(5,((((p->horizontal_blank_end - 1) >> 5) & 1) << 7) | (p->horizontal_start_delay_after_retrace << 5) | + (p->horizontal_end_retrace & 0x1F)); + + /* finish by writing reg 0x17 which also enables sync */ + vga_write_CRTC(0x17, + (p->sync_enable << 7) | + (vga_read_CRTC(0x17) & 0x10) | /* NTS: one undocumented bit, perhaps best not to change it */ + ((p->word_mode^1) << 6) | + (p->address_wrap_select << 5) | + (p->memaddr_div2 << 3) | + (p->scanline_div2 << 2) | + ((p->map14 ^ 1) << 1) | + ((p->map13 ^ 1) << 0)); + + /* reinforce write protect */ + c = vga_read_CRTC(0x11); + vga_write_CRTC(0x11,c|0x80); +} + +void vga_read_crtc_mode_(struct vga_mode_params *p) { + unsigned char c,c2; + + if (!(vga_state.vga_flags & VGA_IS_VGA)) + return; + + c = inp(0x3CC); /* misc out reg */ + p->clock_select = (c >> 2) & 3; + p->hsync_neg = (c >> 6) & 1; + p->vsync_neg = (c >> 7) & 1; + + c = vga_read_sequencer(1); + p->clock9 = (c & 1) ^ 1; + p->clock_div2 = (c >> 3) & 1; + p->shift4_enable = (c >> 4) & 1; + p->shift_load_rate = (c >> 2) & 1; + + p->sync_enable = (vga_read_CRTC(0x17) >> 7) & 1; + p->word_mode = ((vga_read_CRTC(0x17) >> 6) & 1) ^ 1; + p->address_wrap_select = (vga_read_CRTC(0x17) >> 5) & 1; + p->memaddr_div2 = (vga_read_CRTC(0x17) >> 3) & 1; + p->scanline_div2 = (vga_read_CRTC(0x17) >> 2) & 1; + p->map14 = ((vga_read_CRTC(0x17) >> 1) & 1) ^ 1; + p->map13 = ((vga_read_CRTC(0x17) >> 0) & 1) ^ 1; + + p->dword_mode = (vga_read_CRTC(0x14) >> 6) & 1; + p->horizontal_total = vga_read_CRTC(0) + 5; + p->horizontal_display_end = vga_read_CRTC(1);// + 1; + p->horizontal_blank_start = vga_read_CRTC(2) + 1; + p->horizontal_blank_end = ((vga_read_CRTC(3) & 0x1F) | ((vga_read_CRTC(5) >> 7) << 5) | + ((p->horizontal_blank_start - 1) & (~0x3F))) + 1; + if (p->horizontal_blank_start >= p->horizontal_blank_end) + p->horizontal_blank_end += 0x40; + p->horizontal_start_retrace = vga_read_CRTC(4); + p->horizontal_end_retrace = (vga_read_CRTC(5) & 0x1F) | + (p->horizontal_start_retrace & (~0x1F)); + if ((p->horizontal_start_retrace&0x1F) >= (p->horizontal_end_retrace&0x1F)) + p->horizontal_end_retrace += 0x20; + p->horizontal_start_delay_after_total = (vga_read_CRTC(3) >> 5) & 3; + p->horizontal_start_delay_after_retrace = (vga_read_CRTC(5) >> 5) & 3; + + c = vga_read_CRTC(7); /* c = overflow reg */ + c2 = vga_read_CRTC(9); + + p->scan_double = (c2 >> 7) & 1; + p->max_scanline = (c2 & 0x1F) + 1; + p->offset = vga_read_CRTC(0x13); + p->vertical_total = (vga_read_CRTC(6) | ((c & 1) << 8) | (((c >> 5) & 1) << 9)) + 2; + p->vertical_start_retrace = (vga_read_CRTC(0x10) | (((c >> 2) & 1) << 8) | (((c >> 7) & 1) << 9)); + p->vertical_end_retrace = (vga_read_CRTC(0x11) & 0xF) | + (p->vertical_start_retrace & (~0xF)); + if ((p->vertical_start_retrace&0xF) >= (p->vertical_end_retrace&0xF)) + p->vertical_end_retrace += 0x10; + p->refresh_cycles_per_scanline = ((vga_read_CRTC(0x11) >> 6) & 1) ? 5 : 3; + p->inc_mem_addr_only_every_4th = (vga_read_CRTC(0x14) >> 5) & 1; + p->vertical_display_end = ((vga_read_CRTC(0x12) | (((c >> 1) & 1) << 8) | (((c >> 6) & 1) << 9))) + 1; + p->vertical_blank_start = ((vga_read_CRTC(0x15) | (((c >> 3) & 1) << 8) | (((c2 >> 5) & 1) << 9))) + 1; + p->vertical_blank_end = ((vga_read_CRTC(0x16) & 0x7F) | ((p->vertical_blank_start - 1) & (~0x7F))) + 1; + if (p->vertical_blank_start >= p->vertical_blank_end) + p->vertical_blank_end += 0x80; +} diff --git a/src/lib/modex16.h b/src/lib/modex16.h index 3ba8753c..c33d26d1 100755 --- a/src/lib/modex16.h +++ b/src/lib/modex16.h @@ -148,7 +148,7 @@ void modexPalWhite(); void modexPalUpdate(bitmap_t *bmp, word *i, word qp, word aqoffset); void modexPalUpdate1(byte *p); void modexPalUpdate0(byte *p); -void modexPalOverscan(byte *p, word col); +void modexPalOverscan(word col); void modexchkcolor(bitmap_t *bmp, word *q, word *a, word *aa, word *z, word *i/*, word *offset*/); void modexputPixel(page_t *page, int x, int y, byte color); byte modexgetPixel(page_t *page, int x, int y); @@ -186,5 +186,7 @@ void modexcls(page_t *page, byte color, byte *Where); void modexWaitBorder(); void bios_cls(); void modexprintmeminfo(video_t *v); +void vga_write_crtc_mode_(struct vga_mode_params *p,unsigned int flags); +void vga_read_crtc_mode_(struct vga_mode_params *p); #endif diff --git a/src/scroll.c b/src/scroll.c index 6d6f0723..90a3ba3f 100755 --- a/src/scroll.c +++ b/src/scroll.c @@ -283,8 +283,8 @@ void main(int argc, char *argv[]) }*/ //9 - if(IN_KeyDown(10)){ modexPalOverscan(default_pal, rand()%56); modexPalUpdate1(default_pal); IN_UserInput(1,1); } - //if(IN_KeyDown(11)){ modexPalOverscan(default_pal, 15); } + if(IN_KeyDown(10)){ modexPalOverscan(rand()%56); modexPalUpdate1(default_pal); IN_UserInput(1,1); } + //if(IN_KeyDown(11)){ modexPalOverscan(15); } if((player[0].q==1) && !(player[0].x%TILEWH==0 && player[0].y%TILEWH==0)) break; //incase things go out of sync! } diff --git a/src/test.c b/src/test.c index 74b84dce..69d35d04 100755 --- a/src/test.c +++ b/src/test.c @@ -24,6 +24,7 @@ #include "src/lib/modex16.h" #include "src/lib/16_in.h" #include "src/lib/scroll16.h" +#include "src/lib/bakapee.h" global_game_variables_t gvar; player_t player[MaxPlayers]; @@ -38,11 +39,12 @@ void main(int argc, char *argv[]) byte *pal, *pal2; sword bakapee; + word colo=LGQ; + //argument if(argv[1]) bakapee = atoi(argv[1]); else bakapee = 1; - // DOSLIB: check our environment probe_dos(); @@ -72,9 +74,6 @@ void main(int argc, char *argv[]) _DEBUG("Serial debug output started\n"); // NTS: All serial output must end messages with newline, or DOSBox-X will not emit text to log _DEBUGF("Serial debug output printf test %u %u %u\n",1U,2U,3U); - /* load our palette */ - modexLoadPalFile("data/default.pal", &pal2); - /* save the palette */ pal = modexNewPal(); modexPalSave(pal); @@ -89,6 +88,12 @@ void main(int argc, char *argv[]) VGAmodeX(bakapee, 1, &gvar); modexPalBlack(); + /* load our palette */ + modexLoadPalFile("data/default.pal", &pal2); + + /* overscan show */ + //modexPalOverscan(44+1); + /* set up the page, but with 16 pixels on all borders in offscreen mem */ modexHiganbanaPageSetup(&gvar.video); for(i=0;iHGQ) colo=LGQ; + } +// if(i>PAL_SIZE) i=0; + }//9 if(IN_KeyDown(25)){ modexpdump(&gvar.video.page[pan.pn]); IN_UserInput(1,1); diff --git a/vrl2vrs b/vrl2vrs index acdd4bda..b67956b7 100755 Binary files a/vrl2vrs and b/vrl2vrs differ diff --git a/vrsdump b/vrsdump index 8ba0497d..dbaba30e 100755 Binary files a/vrsdump and b/vrsdump differ