From: sparky4 Date: Fri, 1 Sep 2017 03:07:42 +0000 (-0500) Subject: added dosbox dro improved recording diff X-Git-Url: http://4ch.mooo.com/gitweb/?a=commitdiff_plain;h=d8b18b44f54fa54f4500ccfa7467dc5ed3a1bf3a;p=16.git added dosbox dro improved recording diff --- diff --git a/16/dosbox_0.74_mod.diff b/16/dosbox_0.74_mod.diff new file mode 100755 index 00000000..e806e645 --- /dev/null +++ b/16/dosbox_0.74_mod.diff @@ -0,0 +1,246 @@ +diff -Nru src_old/hardware/adlib.cpp src/hardware/adlib.cpp +--- src_old/hardware/adlib.cpp 2010-05-10 17:43:54 +0000 ++++ src/hardware/adlib.cpp 2012-06-29 20:17:08 +0000 +@@ -150,6 +150,7 @@ + bool doneOpl3; + bool doneDualOpl2; + ++ Mode mode; + RegisterCache* cache; + + void MakeEntry( Bit8u reg, Bit8u& raw ) { +@@ -162,9 +163,10 @@ + memset( ToReg, 0xff, sizeof ( ToReg ) ); + memset( ToRaw, 0xff, sizeof ( ToRaw ) ); + //Select the entries that are valid and the index is the mapping to the index entry +- MakeEntry( 0x01, index ); //0x01: Waveform select +- MakeEntry( 0x04, index ); //104: Four-Operator Enable ++ // Note by Valley Bell: Moved 05 to the very beginning for correct OPL3 initialization. + MakeEntry( 0x05, index ); //105: OPL3 Mode Enable ++ MakeEntry( 0x04, index ); //104: Four-Operator Enable ++ MakeEntry( 0x01, index ); //01: Waveform select + MakeEntry( 0x08, index ); //08: CSW / NOTE-SEL + MakeEntry( 0xbd, index ); //BD: Tremolo Depth / Vibrato Depth / Percussion Mode / BD/SD/TT/CY/HH On + //Add the 32 byte range that hold the 18 operators +@@ -209,13 +211,29 @@ + Although you could pretty much just stick to always doing opl3 on the player side + */ + //Enabling opl3 4op modes will make us go into opl3 mode +- if ( header.hardware != HW_OPL3 && regFull == 0x104 && val && (*cache)[0x105] ) { ++ /*if ( header.hardware != HW_OPL3 && regFull == 0x104 && val && (*cache)[0x105] ) { + header.hardware = HW_OPL3; +- } +- //Writing a keyon to a 2nd address enables dual opl2 otherwise +- //Maybe also check for rhythm +- if ( header.hardware == HW_OPL2 && regFull >= 0x1b0 && regFull <=0x1b8 && val ) { +- header.hardware = HW_DUALOPL2; ++ } */ ++ if (mode == MODE_OPL3) ++ { ++ // Valley Bell: OPL3 Mode should be enabled by 0x105 bit 0 ++ // else there will be no stereo sound ++ if ( header.hardware != HW_OPL3 && regFull == 0x105 && (val & 0x01) ) { ++ header.hardware = HW_OPL3; ++ } ++ } ++ else if (mode == MODE_DUALOPL2) ++ { ++ //Writing a keyon to a 2nd address enables dual opl2 otherwise ++ //Maybe also check for rhythm ++ if ( header.hardware == HW_OPL2 && regFull >= 0x1b0 && regFull <= 0x1b8 && val ) { ++ header.hardware = HW_DUALOPL2; ++ } ++ } ++ else if (mode == MODE_OPL2) ++ { ++ if (regFull & 0x100) ++ return; + } + Bit8u raw = ToRaw[ regMask ]; + if ( raw == 0xff ) +@@ -227,10 +245,10 @@ + void WriteCache( void ) { + Bitu i, val; + /* Check the registers to add */ +- for (i=0;i<256;i++) { ++ /*for (i=0;i<256;i++) { + //Skip the note on entries +- if (i>=0xb0 && i<=0xb8) +- continue; ++ // if (i>=0xb0 && i<=0xb8) ++ // continue; // Valley Bell: not neccessary anymore + val = (*cache)[ i ]; + if (val) { + AddWrite( i, val ); +@@ -239,6 +257,37 @@ + if (val) { + AddWrite( 0x100 + i, val ); + } ++ }*/ ++ ++ if (mode == MODE_OPL3) ++ { ++ val = (*cache)[0x105]; ++ AddWrite(0x105, val); ++ } ++ else if (mode == MODE_DUALOPL2) ++ { ++ for (i = 0x01B0; i < 0x1B9; i ++) ++ { ++ val = (*cache)[i]; ++ if (val) ++ { ++ header.hardware = HW_DUALOPL2; ++ break; ++ } ++ } ++ } ++ // Valley Bell: new loop for better DRO initialization ++ for (i = 1; i < RawUsed; i ++) ++ { ++ val = (*cache)[ToReg[i]]; ++ AddWrite(ToReg[i], val); ++ ++ //if (mode != MODE_OPL2) ++ if (header.hardware != HW_OPL2) ++ { ++ val = (*cache)[0x100 | ToReg[i]]; ++ AddWrite(0x100 | ToReg[i], val); ++ } + } + } + void InitHeader( void ) { +@@ -274,13 +323,14 @@ + */ + Bit8u raw = ToRaw[ regMask ]; + if ( raw == 0xff ) { ++ //LOG_MSG("Skipped DRO Write: Reg %02X Data %02X", regFull, val); + return true; + } + /* Check if this command will not just replace the same value + in a reg that doesn't do anything with it + */ +- if ( (*cache)[ regFull ] == val ) +- return true; ++ /*if ( (*cache)[ regFull ] == val ) ++ return true;*/ // Valley Bell: bad for later trimming + /* Check how much time has passed */ + Bitu passed = PIC_Ticks - lastTicks; + lastTicks = PIC_Ticks; +@@ -289,10 +339,10 @@ + //if ( passed > 0 ) LOG_MSG( "Delay %d", passed ) ; + + // If we passed more than 30 seconds since the last command, we'll restart the the capture +- if ( passed > 30000 ) { ++ /*if ( passed > 30000 ) { + CloseFile(); + goto skipWrite; +- } ++ }*/ + while (passed > 0) { + if (passed < 257) { //1-256 millisecond delay + AddBuf( delay256, passed - 1 ); +@@ -309,14 +359,14 @@ + skipWrite: + //Not yet capturing to a file here + //Check for commands that would start capturing, if it's not one of them return +- if ( !( ++ /*if ( !( + //note on in any channel + ( regMask>=0xb0 && regMask<=0xb8 && (val&0x020) ) || + //Percussion mode enabled and a note on in any percussion instrument + ( regMask == 0xbd && ( (val&0x3f) > 0x20 ) ) + )) { + return true; +- } ++ }*/ // Valley Bell: I don't want this for serious logging + handle = OpenCaptureFile("Raw Opl",".dro"); + if (!handle) + return false; +@@ -330,11 +380,12 @@ + /* Write the command that triggered this */ + AddWrite( regFull, val ); + //Init the timing information for the next commands +- lastTicks = PIC_Ticks; ++ lastTicks = PIC_Ticks; + startTicks = PIC_Ticks; + return true; + } +- Capture( RegisterCache* _cache ) { ++ Capture( Mode _mode, RegisterCache* _cache ) { ++ mode = _mode; + cache = _cache; + handle = 0; + bufUsed = 0; +@@ -419,6 +470,10 @@ + } + + void Module::DualWrite( Bit8u index, Bit8u reg, Bit8u val ) { ++ Bit32u fullReg = reg + (index ? 0x100 : 0); ++ // Valley Bell: moved here for more accurate logging ++ CacheWrite( fullReg, val ); ++ + //Make sure you don't use opl3 features + //Don't allow write to disable opl3 + if ( reg == 5 ) { +@@ -436,9 +491,7 @@ + val &= 0x0f; + val |= index ? 0xA0 : 0x50; + } +- Bit32u fullReg = reg + (index ? 0x100 : 0); + handler->WriteReg( fullReg, val ); +- CacheWrite( fullReg, val ); + } + + +@@ -455,8 +508,8 @@ + case MODE_OPL3: + if ( !chip[0].Write( reg.normal, val ) ) { + handler->WriteReg( reg.normal, val ); +- CacheWrite( reg.normal, val ); + } ++ CacheWrite( reg.normal, val ); // Valley Bell: moved here for more accurate logging + break; + case MODE_DUALOPL2: + //Not a 0x??8 port, then write to a specific port +@@ -534,7 +587,7 @@ + //Setup opl3 mode in the hander + handler->WriteReg( 0x105, 1 ); + //Also set it up in the cache so the capturing will start opl3 +- CacheWrite( 0x105, 1 ); ++ //CacheWrite( 0x105, 1 ); // VGMs can handle Dual OPL2 correctly and don't need OPL3 mode + break; + } + } +@@ -617,8 +670,9 @@ + module->capture = 0; + LOG_MSG("Stopped Raw OPL capturing."); + } else { +- LOG_MSG("Preparing to capture Raw OPL, will start with first note played."); +- module->capture = new Adlib::Capture( &module->cache ); ++ //LOG_MSG("Preparing to capture Raw OPL, will start with first note played."); ++ module->capture = new Adlib::Capture( module->mode, &module->cache ); ++ module->capture->DoWrite(0x00, 0x00); // start capturing + } + } + +diff -Nru src_old/hardware/adlib.h src/hardware/adlib.h +--- src_old/hardware/adlib.h 2010-05-10 17:43:54 +0000 ++++ src/hardware/adlib.h 2012-05-25 18:37:46 +0000 +@@ -120,7 +120,7 @@ + MixerObject mixerObject; + + //Mode we're running in +- Mode mode; ++ //Mode mode; + //Last selected address in the chip for the different modes + union { + Bit32u normal; +@@ -134,6 +134,7 @@ + Bit32u lastUsed; //Ticks when adlib was last used to turn of mixing after a few second + + Handler* handler; //Handler that will generate the sound ++ Mode mode; + RegisterCache cache; + Capture* capture; + Chip chip[2];