From: Jonathan Campbell Date: Wed, 6 Apr 2016 16:02:53 +0000 (-0700) Subject: use doslib to change HSYNC/VSYNC polarity and ensure 25MHz clock. X-Git-Url: http://4ch.mooo.com/gitweb/?p=16.git;a=commitdiff_plain;h=6245ae3447f2f001412b05d37dc4482a5256656f use doslib to change HSYNC/VSYNC polarity and ensure 25MHz clock. --- diff --git a/16/doslib b/16/doslib deleted file mode 160000 index 97569044..00000000 --- a/16/doslib +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 975690444b74e8f28ad288412c0b0c754fab2342 diff --git a/git_con.fig b/git_con.fig index 9c560e30..927bd4df 100755 --- a/git_con.fig +++ b/git_con.fig @@ -3,21 +3,13 @@ filemode = true bare = false logallrefupdates = true -[remote "x4"] - url = ssh://sparky4@4ch.mooo.com:26/var/www/16/16.git - fetch = +refs/heads/*:refs/remotes/x4/* +[remote "origin"] + url = https://github.com/sparky4/16 + fetch = +refs/heads/*:refs/remotes/origin/* [branch "master"] remote = origin merge = refs/heads/master -[remote "origin"] - url = git@github.com:sparky4/16.git - fetch = +refs/heads/*:refs/remotes/origin/* -[remote "sf"] - url = ssh://sparky4q@git.code.sf.net/p/project16/code - fetch = +refs/heads/*:refs/remotes/sf/* -[remote "jp"] - url = ssh://sparky4@git.pf.osdn.jp:/gitroot/s/sp/sparky4/project16.git - fetch = +refs/heads/*:refs/remotes/jp/* -[remote "bb"] - url = git@bitbucket.org:sparky4/16.git - fetch = +refs/heads/*:refs/remotes/bb/* +[submodule "src/lib/doslib"] + url = https://github.com/joncampbell123/doslib.git +[submodule "src/lib/jsmn"] + url = https://github.com/zserge/jsmn.git diff --git a/src/lib/doslib b/src/lib/doslib index b84bf02a..59167c4e 160000 --- a/src/lib/doslib +++ b/src/lib/doslib @@ -1 +1 @@ -Subproject commit b84bf02ac8fffdfc6ff569a36efe57ed3a450ef0 +Subproject commit 59167c4e8f584f452ff5c822b4d535f5d622d0a0 diff --git a/src/lib/modex16.c b/src/lib/modex16.c index 1328ac59..d5e17a98 100755 --- a/src/lib/modex16.c +++ b/src/lib/modex16.c @@ -143,6 +143,9 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv) cm.vertical_display_end = 480; cm.vertical_blank_start = 0x1E7 + 1; cm.vertical_blank_end = 0x206 + 1; + cm.clock_select = 0; /* misc register = 0xE3 25MHz */ + cm.vsync_neg = 1; + cm.hsync_neg = 1; vga_write_crtc_mode(&cm,0); } @@ -227,27 +230,7 @@ modexsetBaseXMode() { /* TODO save current video mode and palette */ vgaSetMode(VGA_256_COLOR_MODE); - vga_enable_256color_modex(); - - /* disable chain4 mode */ - //outpw(SC_INDEX, 0x0604); - - /* synchronous reset while setting Misc Output */ - //outpw(SC_INDEX, 0x0100); - - /* select 25 MHz dot clock & 60 Hz scanning rate */ - outp(MISC_OUTPUT, 0xe3); - - /* undo reset (restart sequencer) */ - //outpw(SC_INDEX, 0x0300); - - /* reprogram the CRT controller */ - outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */ -// temp = inp(CRTC_DATA) & 0x7F; -// outp(CRTC_INDEX, 0x11); - outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */ -// outp(CRTC_DATA, temp); /* get current write protect on varios regs */ update_state_from_vga(); }