16/tauron/C_SRC/MODES_C.INC

   1 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
   2 //=-                                                                         -=\r
   3 //=-                   Tauron VGA Utilities Version 3.0                      -=\r
   4 //=-                      Released September 20, 1998                        -=\r
   5 //=-                                                                         -=\r
   6 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
   7 //=- Copyright (c) 1997, 1998 by Jeff Morgan  =-= This code is FREE provided -=\r
   8 //=- All Rights Reserved.                     =-= that you put my name some- -=\r
   9 //=-                                          =-= where in your credits.     -=\r
  10 //=- DISCLAIMER:                              =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  11 //=- I assume no responsibility whatsoever for any effect that this package, -=\r
  12 //=- the information contained therein or the use thereof has on you, your   -=\r
  13 //=- sanity, computer, spouse, children, pets or anything else related to    -=\r
  14 //=- you or your existance. No warranty is provided nor implied with this    -=\r
  15 //=- source code.                                                            -=\r
  16 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  17 //=- VGA register variables for the various videomodes                       -=\r
  18 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  19 \r
  20 // Same as Mode 01H\r
  21 unsigned char mode00h[62] = {\r
  22 // MISC reg,  STATUS reg,    SEQ regs\r
  23    0x67,      0x00,          0x03,0x08,0x03,0x00,0x02,\r
  24 // CRTC regs\r
  25 0x2D,0x27,0x28,0x90,0x2B,0xA0,0xBF,0x1F,0x00,0x4F,0x06,0x07,0x00,0x00,0x00,\r
  26 0x31,0x9C,0x8E,0x8F,0x14,0x1F,0x96,0xB9,0xA3,0xFF,\r
  27 // GRAPHICS regs\r
  28 0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,0xFF,\r
  29 // ATTRIBUTE CONTROLLER regs\r
  30 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x10,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
  31 0x0C,0x00,0x0F,0x08,0x00\r
  32 };\r
  33 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  34 \r
  35 \r
  36 // Same as Mode 02H\r
  37 unsigned char mode03h[62] = {\r
  38 // MISC reg,  STATUS reg,    SEQ regs\r
  39    0x67,      0x00,          0x03,0x00,0x03,0x00,0x02,\r
  40 // CRTC regs\r
  41 0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,0x00,0x4F,0x0E,0x0F,0x00,0x00,0x00,\r
  42 0x00,0x9C,0x0E,0x8F,0x28,0x01,0x96,0xB9,0xA3,0xFF,\r
  43 // GRAPHICS regs\r
  44 0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,0xFF,\r
  45 // ATTRIBUTE CONTROLLER regs\r
  46 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x10,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
  47 0x0C,0x00,0x0F,0x08,0x00\r
  48 };\r
  49 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  50 \r
  51 // Same as Mode 05,\r
  52 unsigned char mode04h[62] = {\r
  53 // MISC reg,  STATUS reg,    SEQ regs\r
  54    0x63,      0x00,          0x03,0x09,0x03,0x00,0x02,\r
  55 // CRTC regs\r
  56 0x2D,0x27,0x28,0x90,0x2B,0x80,0x0BF,0x1F,0x00,0x0C1,0x00,0x00,0x00,0x00,0x00,\r
  57 0x31,0x9C,0x8E,0x8F,0x14,0x00,0x96,0xB9,0x0A2,0xFF,\r
  58 // GRAPHICS regs\r
  59 0x00,0x00,0x00,0x00,0x00,0x30,0x0F,0x00,0xFF,\r
  60 // ATTRIBUTE CONTROLLER regs\r
  61 0x00,0x3B,0x3D,0x3F,0x02,0x04,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,\r
  62 0x01,0x00,0x03,0x00,0x00\r
  63 };\r
  64 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  65 \r
  66 unsigned char mode06h[62] = {\r
  67 // MISC reg,  STATUS reg,    SEQ regs\r
  68    0x63,      0x00,          0x03,0x01,0x01,0x00,0x06,\r
  69 // CRTC regs\r
  70 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0BF,0x1F,0x00,0x0C1,0x00,0x00,0x00,0x00,0x00,\r
  71 0x00,0x9C,0x8E,0x8F,0x28,0x00,0x96,0xB9,0x0C2,0xFF,\r
  72 // GRAPHICS regs\r
  73 0x00,0x00,0x00,0x00,0x00,0x00,0x0D,0x00,0xFF,\r
  74 // ATTRIBUTE CONTROLLER regs\r
  75 0x00,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,\r
  76 0x01,0x00,0x01,0x00,0x00\r
  77 };\r
  78 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  79 \r
  80 unsigned char mode07h[62] = {\r
  81 // MISC reg,  STATUS reg,    SEQ regs\r
  82    0x066,     0x00,          0x03,0x00,0x03,0x00,0x02,\r
  83 // CRTC regs\r
  84 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\r
  85 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\r
  86 // GRAPHICS regs\r
  87 0x00,0x00,0x00,0x00,0x00,0x10,0x0A,0x00,0xFF,\r
  88 // ATTRIBUTE CONTROLLER regs\r
  89 0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18,\r
  90 0x0E,0x00,0x0F,0x00,0x00\r
  91 };\r
  92 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
  93 \r
  94 unsigned char mode0Dh[62] = {\r
  95 // MISC reg,  STATUS reg,    SEQ regs\r
  96    0x063,     0x00,          0x03,0x09,0x0F,0x00,0x06,\r
  97 // CRTC regs\r
  98 0x2D,0x27,0x28,0x90,0x2B,0x80,0x0BF,0x1F,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,\r
  99 0x31,0x9C,0x8E,0x8F,0x14,0x00,0x96,0xB9,0xE3,0xFF,\r
 100 // GRAPHICS regs\r
 101 0x00,0x00,0x00,0x00,0x00,0x10,0x05,0x00,0xFF,\r
 102 // ATTRIBUTE CONTROLLER regs\r
 103 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x10,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
 104 0x01,0x00,0x0F,0x00,0x00\r
 105 };\r
 106 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 107 \r
 108 unsigned char mode0Eh[62] = {\r
 109 // MISC reg,  STATUS reg,    SEQ regs\r
 110    0x63,      0x00,          0x03,0x01,0x0F,0x00,0x06,\r
 111 // CRTC regs\r
 112 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0BF,0x1F,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,\r
 113 0x59,0x9C,0x8E,0x8F,0x28,0x00,0x96,0xB9,0xE3,0xFF,\r
 114 // GRAPHICS regs\r
 115 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,\r
 116 // ATTRIBUTE CONTROLLER regs\r
 117 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x08,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
 118 0x01,0x00,0x0F,0x00,0x00\r
 119 };\r
 120 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 121 \r
 122 unsigned char mode0Fh[62] = {\r
 123 // MISC reg,  STATUS reg,    SEQ regs\r
 124    0x0A2,     0x00,          0x03,0x01,0x0F,0x00,0x06,\r
 125 // CRTC regs\r
 126 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\r
 127 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\r
 128 // GRAPHICS regs\r
 129 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,0xFF,\r
 130 // ATTRIBUTE CONTROLLER regs\r
 131 0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00,\r
 132 0x0B,0x00,0x05,0x00,0x00\r
 133 };\r
 134 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 135 \r
 136 unsigned char mode10h[62] = {\r
 137 // MISC reg,  STATUS reg,    SEQ regs\r
 138    0x0A3,     0x00,          0x03,0x01,0x0F,0x00,0x06,\r
 139 // CRTC regs\r
 140 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0BF,0x1F,0x00,0x40,0x00,0x00,0x00,0x00,0x00,\r
 141 0x00,0x83,0x85,0x5D,0x28,0x0F,0x63,0x0BA,0xE3,0xFF,\r
 142 // GRAPHICS regs\r
 143 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,\r
 144 // ATTRIBUTE CONTROLLER regs\r
 145 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,\r
 146 0x01,0x00,0x0F,0x00,0x00\r
 147 };\r
 148 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 149 \r
 150 unsigned char mode11h[62] = {\r
 151 // MISC reg,  STATUS reg,    SEQ regs\r
 152    0xE3,     0x00,          0x03,0x01,0x0F,0x00,0x06,\r
 153 // CRTC regs\r
 154 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x59,\r
 155 0xEA,0x8C,0x0DF,0x28,0x0F,0x0E7,0x004,0x0C3,0xFF,\r
 156 // GRAPHICS regs\r
 157 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05,0xFF,\r
 158 // ATTRIBUTE CONTROLLER regs\r
 159 0x00,0x08,0x3F,0x3F,0x18,0x18,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,\r
 160 0x01,0x00,0x0F,0x00,0x00\r
 161 \r
 162 };\r
 163 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 164 \r
 165 unsigned char mode12h[62] = {\r
 166 // MISC reg,  STATUS reg,    SEQ regs\r
 167    0xE3,     0x00,          0x03,0x01,0x0F,0x00,0x06,\r
 168 // CRTC regs\r
 169 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0B,0x3E,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x59,\r
 170 0xEA,0x8C,0x0DF,0x28,0x00,0x0E7,0x04,0xE3,0xFF,\r
 171 // GRAPHICS regs\r
 172 0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,0xFF,\r
 173 // ATTRIBUTE CONTROLLER regs\r
 174 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,\r
 175 0x01,0x00,0x0F,0x00,0x00\r
 176 };\r
 177 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 178 \r
 179 unsigned char mode13h[62] = {\r
 180 // MISC reg,  STATUS reg,    SEQ regs\r
 181    0x63,      0x00,          0x03,0x01,0x0F,0x00,0x0E,\r
 182 // CRTC regs\r
 183 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0BF,0x1F,0x00,0x41,0x00,0x00,0x00,0x00,0x00,\r
 184 0x00,0x9C,0x0E,0x8F,0x28,0x40,0x96,0xB9,0x0A3,0xFF,\r
 185 // GRAPHICS regs\r
 186 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,\r
 187 // ATTRIBUTE CONTROLLER regs\r
 188 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,\r
 189 0x41,0x00,0x0F,0x00,0x00\r
 190 };\r
 191 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 192 \r
 193 unsigned char modeC4[62] = {\r
 194 // MISC reg,  STATUS reg,    SEQ regs\r
 195    0x63,      0x00,          0x03,0x01,0x0F,0x00,0x06,\r
 196 // CRTC regs\r
 197 0x5F,0x4F,0x50,0x82,0x54,0x80,0x0BF,0x1F,0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00,\r
 198 0x9C,0x0E,0x8F,0x28,0x00,0x96,0xB9,0xE3,0xFF,\r
 199 // GRAPHICS regs\r
 200 0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,0xFF,\r
 201 // ATTRIBUTE CONTROLLER regs\r
 202 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,\r
 203 0x41,0x00,0x0F,0x00,0x00\r
 204 };\r
 205 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 206 \r
 207 unsigned char modeJ[62] = {\r
 208 // MISC reg,  STATUS reg,    SEQ regs\r
 209    0xa3,      0x00,          0x03,0x01,0x03,0x00,0x02,\r
 210 // CRTC regs\r
 211 0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,0x00,0x47,0x0E,0x0F,0x00,0x00,0x00,\r
 212 0x00,0x83,0x85,0x57,0x28,0x1F,0x60,0xB8,0xA3,0xFF,\r
 213 // GRAPHICS regs\r
 214 0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,0xFF,\r
 215 // ATTRIBUTE CONTROLLER regs\r
 216 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x10,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
 217 0x0C,0x00,0x0F,0x00,0x00\r
 218 };\r
 219 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 220 \r
 221 unsigned char modeK[62] = {\r
 222 // MISC reg,  STATUS reg,    SEQ regs\r
 223    0x63,      0x00,          0x03,0x01,0x03,0x00,0x02,\r
 224 // CRTC regs\r
 225 0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,0x00,0x47,0x0E,0x0F,0x00,0x00,0x00,\r
 226 0x00,0x9C,0x8E,0x8F,0x28,0x1F,0x96,0xB9,0xA3,0xFF,\r
 227 // GRAPHICS regs\r
 228 0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,0xFF,\r
 229 // ATTRIBUTE CONTROLLER regs\r
 230 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x10,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
 231 0x0C,0x00,0x0F,0x00,0x00\r
 232 };\r
 233 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 234 \r
 235 unsigned char modeL[62] = {\r
 236 // MISC reg,  STATUS reg,    SEQ regs\r
 237 0x67,0x00,0x03,0x08,0x03,0x00,0x02,\r
 238 // CRTC regs\r
 239 0x2D,0x27,0x28,0x90,0x2B,0x0A0,0x0BF,0x1F,0x00,0x47,0x06,0x07,0x00,0x00,0x00,\r
 240 0x31,0x83,0x85,0x57,0x14,0x1F,0x60,0x0B8,0x0A3,0x0FF,\r
 241 // GRAPHICS regs\r
 242 0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,0x0FF,\r
 243 // ATTRIBUTE CONTROLLER regs\r
 244 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x10,0x11,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
 245 0x0C,0x00,0x0F,0x00,0x00,\r
 246 };\r
 247 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r
 248 \r
 249 \r
 250 unsigned char modeM[62] = {\r
 251 // MISC reg,  STATUS reg,    SEQ regs\r
 252 0x67,0x00,0x03,0x08,0x03,0x00,0x02,\r
 253 // CRTC regs\r
 254 0x2D,0x27,0x28,0x90,0x2B,0x0A0,0x0BF,0x1F,0x00,0x47,0x06,0x07,0x00,0x00,0x00,0x31,\r
 255 0x9C,0x8E,0x8F,0x14,0x1F,0x96,0x0B9,0x0A3,0x0FF,\r
 256 // GRAPHICS regs\r
 257 0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,0x0FF,\r
 258 // ATTRIBUTE CONTROLLER regs\r
 259 0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,\r
 260 0x0C,0x00,0x0F,0x00,0x00,\r
 261 };\r
 262 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=\r