1 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
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3 //=- Tauron VGA Utilities Version 3.0 -=
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4 //=- Released September 20, 1998 -=
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6 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
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7 //=- Copyright (c) 1997, 1998 by Jeff Morgan =-= This code is FREE provided -=
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8 //=- All Rights Reserved. =-= that you put my name some- -=
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9 //=- =-= where in your credits. -=
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10 //=- DISCLAIMER: =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
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11 //=- I assume no responsibility whatsoever for any effect that this package, -=
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12 //=- the information contained therein or the use thereof has on you, your -=
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13 //=- sanity, computer, spouse, children, pets or anything else related to -=
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14 //=- you or your existance. No warranty is provided nor implied with this -=
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15 //=- source code. -=
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16 //=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
\r
22 #include "modes_c.inc"
\r
23 #include "palette.inc"
\r
26 void setpalette16();
\r
27 void setpalette256();
\r
30 #define SEQ_ADDR 0x03C4
\r
31 #define GRACON_ADDR 0x03CE
\r
32 #define CRTC_ADDR 0x03D4
\r
34 void ReadBIOSfont(int fontnum, int bytesperchar)
\r
36 char far *biosfont,*vidmem;
\r
38 unsigned char oldmode,oldmisc,oldmem,oldmask;
\r
39 unsigned char newmode,newmisc,newmem;
\r
41 // get the location of the font stroed in BIOS
\r
43 reg.r_bx = fontnum << 8;
\r
46 // Make a pointer to the font
\r
47 biosfont = (char far *)MK_FP( reg.r_es, reg.r_bp);
\r
48 vidmem = (char far *)MK_FP( 0xA000, 0x0000);
\r
50 // Store the OLD 'Mode Register' value
\r
51 outportb(GRACON_ADDR,5);
\r
52 oldmode = inportb(GRACON_ADDR+1);
\r
53 // Store the OLD 'Miscellaneous Register' value
\r
54 outportb(GRACON_ADDR,6);
\r
55 oldmisc = inportb(GRACON_ADDR+1);
\r
56 // Store the OLD 'Mask Map' value
\r
57 outportb(SEQ_ADDR,2);
\r
58 oldmask = inportb(SEQ_ADDR+1);
\r
59 // Store the OLD 'Memory Mode' value
\r
60 outportb(SEQ_ADDR,4);
\r
61 oldmem = inportb(SEQ_ADDR+1);
\r
63 // Write the NEW 'Mode Register' value
\r
64 newmode = (oldmode & 0xFC);
\r
65 outport(GRACON_ADDR, (newmode << 8) | 0x05);
\r
66 // Write the NEW 'Miscellaneous Register' value
\r
67 newmisc = ((oldmisc & 0xF1)|4);
\r
68 outport(GRACON_ADDR, (newmisc << 8) | 0x06);
\r
69 // Write the NEW 'Mask Map' value
\r
70 outport(SEQ_ADDR, 0x0402);
\r
71 // Write the NEW 'Memory Mode' value
\r
72 newmem = (oldmem | 4);
\r
73 outport(SEQ_ADDR, (newmem << 8) | 0x04);
\r
75 // Copy the font from BIOS
\r
76 for (int i = 0; i < 256; i++)
\r
78 for (int j = 0; j < bytesperchar; j++)
\r
80 *vidmem++ = *biosfont++;
\r
82 for (int k = 0; k < 32-bytesperchar; k++)
\r
88 // Write the OLD 'Mode Register' value
\r
89 outport(GRACON_ADDR, (oldmode << 8) | 0x05);
\r
90 // Write the OLD 'Miscellaneous Register' value
\r
91 outport(GRACON_ADDR, (oldmisc << 8) | 0x06);
\r
92 // Write the OLD 'Mask Map' value
\r
93 outport(SEQ_ADDR,(oldmask << 8) | 0x02);
\r
94 // Write the OLD 'Memory Mode' value
\r
95 outport(SEQ_ADDR, (oldmem << 8) | 0x04);
\r
98 void SetMode(unsigned int regs)
\r
131 // Clear Protection bits
\r
155 // Send GRAPHICS regs
\r
175 // Send ATTRCON regs
\r
178 MOV DX,ATTRCON_ADDR
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197 void SetVideoMode(int mode)
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200 if (mode == MODE00H) // 40 x 25 x 16
\r
202 SetMode((unsigned int)&mode00h);
\r
204 ReadBIOSfont(6,16);
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208 Mode.width_bytes = 1000;
\r
210 Mode.attrib = TVU_TEXT;
\r
212 else if (mode == MODE03H) // 80 x 25 x 16
\r
214 SetMode((unsigned int)&mode03h);
\r
216 ReadBIOSfont(6,16);
\r
220 Mode.width_bytes = 2000;
\r
222 Mode.attrib = TVU_TEXT;
\r
224 else if (mode == MODE04H) // 320 x 200 x 4
\r
226 SetMode((unsigned int)&mode04h);
\r
231 Mode.width_bytes = 8192;
\r
233 Mode.attrib = TVU_GRAPHICS;
\r
235 else if (mode == MODE06H) // 640 x 200 x 2
\r
237 SetMode((unsigned int)&mode06h);
\r
241 Mode.width_bytes = 8192;
\r
243 Mode.attrib = TVU_GRAPHICS;
\r
245 else if (mode == MODE07H) // 80 x 25 x 2
\r
247 SetMode((unsigned int)&mode07h);
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251 Mode.width_bytes = 2000;
\r
253 Mode.attrib = TVU_TEXT | TVU_MONOCHROME;
\r
255 else if (mode == MODE0DH) // 320 x 200 x 16
\r
257 SetMode((unsigned int)&mode0Dh);
\r
262 Mode.width_bytes = 8000;
\r
264 Mode.attrib = TVU_GRAPHICS | TVU_PLANAR;
\r
266 else if (mode == MODE0EH) // 640 x 200 x 16
\r
268 SetMode((unsigned int)&mode0Eh);
\r
273 Mode.width_bytes = 16000;
\r
275 Mode.attrib = TVU_GRAPHICS | TVU_PLANAR;
\r
277 else if (mode == MODE0FH) // 640 x 350 x 2
\r
279 SetMode((unsigned int)&mode0Fh);
\r
283 Mode.width_bytes = 28000;
\r
285 Mode.attrib = TVU_GRAPHICS | TVU_MONOCHROME;
\r
287 else if (mode == MODE10H) // 640 x 350 x 16
\r
289 SetMode((unsigned int)&mode10h);
\r
294 Mode.width_bytes = 28000;
\r
296 Mode.attrib = TVU_GRAPHICS | TVU_PLANAR;
\r
298 else if (mode == MODE11H) // 640 x 480 x 2
\r
300 SetMode((unsigned int)&mode11h);
\r
304 Mode.width_bytes = 38400u;
\r
306 Mode.attrib = TVU_GRAPHICS | TVU_PLANAR;
\r
308 else if (mode == MODE12H) // 640 x 480 x 16
\r
310 SetMode((unsigned int)&mode12h);
\r
315 Mode.width_bytes = 38400u;
\r
317 Mode.attrib = TVU_GRAPHICS | TVU_PLANAR;
\r
319 else if (mode == MODE13H) // 320 x 200 x 256
\r
321 SetMode((unsigned int)&mode13h);
\r
326 Mode.width_bytes = 64000u;
\r
328 Mode.attrib = TVU_GRAPHICS;
\r
330 else if (mode == CHAIN4) // unchained 320 x 200 x 256
\r
332 SetMode((unsigned int)&modeC4);
\r
337 Mode.width_bytes = 16000;
\r
339 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
341 else if (mode == MODE_X) // unchained 320 x 240 x 256
\r
343 SetMode((unsigned int)&modeC4);
\r
345 outportb(MISC_ADDR,0xE3);
\r
346 // turn off write protect
\r
347 outport(CRTC_ADDR,0x2C11);
\r
349 outport(CRTC_ADDR,0x0D06);
\r
350 // overflow register
\r
351 outport(CRTC_ADDR,0x3E07);
\r
352 // vertical retrace start
\r
353 outport(CRTC_ADDR,0xEA10);
\r
354 // vertical retrace end AND wr.prot
\r
355 outport(CRTC_ADDR,0xAC11);
\r
356 // vertical display enable end
\r
357 outport(CRTC_ADDR,0xDF12);
\r
358 // start vertical blanking
\r
359 outport(CRTC_ADDR,0xE715);
\r
360 // end vertical blanking
\r
361 outport(CRTC_ADDR,0x0616);
\r
366 Mode.width_bytes = 19200;
\r
368 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
370 else if (mode == MODE_A) // unchained 320 x 350 x 256
\r
372 SetMode((unsigned int)&modeC4);
\r
374 // turn off double scanning mode
\r
375 outportb(CRTC_ADDR,9);
\r
376 outportb(CRTC_ADDR+1,inportb(CRTC_ADDR+1) & ~0x1F);
\r
377 // change the vertical resolution flags to 350
\r
378 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0x80);
\r
379 // turn off write protect
\r
380 outport(CRTC_ADDR,0x2C11);
\r
382 outport(CRTC_ADDR,0xBF06);
\r
383 // overflow register
\r
384 outport(CRTC_ADDR,0x1F07);
\r
385 // vertical retrace start
\r
386 outport(CRTC_ADDR,0x8310);
\r
387 // vertical retrace end AND wr.prot
\r
388 outport(CRTC_ADDR,0x8511);
\r
389 // vertical display enable end
\r
390 outport(CRTC_ADDR,0x5D12);
\r
391 // start vertical blanking
\r
392 outport(CRTC_ADDR,0x6315);
\r
393 // end vertical blanking
\r
394 outport(CRTC_ADDR,0xBA16);
\r
399 Mode.width_bytes = 28000u;
\r
401 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
403 else if (mode == MODE_B) // unchained 320 x 400 x 256
\r
405 SetMode((unsigned int)&modeC4);
\r
406 // turn off double scanning mode
\r
407 outportb(CRTC_ADDR,9);
\r
408 outportb(CRTC_ADDR+1,inportb(CRTC_ADDR+1) & ~0x1F);
\r
409 // change the vertical resolution flags to 400
\r
410 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0x40);
\r
415 Mode.width_bytes = 32000;
\r
417 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
419 else if (mode == MODE_C) // unchained 320 x 480 x 256
\r
421 SetMode((unsigned int)&modeC4);
\r
423 // turn off double scanning mode
\r
424 outportb(CRTC_ADDR,9);
\r
425 outportb(CRTC_ADDR+1,inportb(CRTC_ADDR+1) & ~0x1F);
\r
426 // change the vertical resolution flags to 480
\r
427 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0xC0);
\r
428 // turn off write protect
\r
429 outport(CRTC_ADDR,0x2C11);
\r
431 outport(CRTC_ADDR,0x0D06);
\r
432 // overflow register
\r
433 outport(CRTC_ADDR,0x3E07);
\r
434 // vertical retrace start
\r
435 outport(CRTC_ADDR,0xEA10);
\r
436 // vertical retrace end AND wr.prot
\r
437 outport(CRTC_ADDR,0xAC11);
\r
438 // vertical display enable end
\r
439 outport(CRTC_ADDR,0xDF12);
\r
440 // start vertical blanking
\r
441 outport(CRTC_ADDR,0xE715);
\r
442 // end vertical blanking
\r
443 outport(CRTC_ADDR,0x0616);
\r
448 Mode.width_bytes = 38400u;
\r
450 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
452 else if (mode == MODE_D) // unchained 360 x 200 x 256
\r
454 SetMode((unsigned int)&mode13h);
\r
456 // Turn off Chain 4
\r
457 outport(SEQ_ADDR,0x0604);
\r
458 // Activate a synchronous reset
\r
459 outport(SEQ_ADDR,0x0100);
\r
460 // Select 28 mhz pixel clock
\r
461 outportb(MISC_ADDR,0xE7);
\r
462 // Release synchronous reset
\r
463 outport(SEQ_ADDR,0x0300);
\r
465 // change the vertical resolution flags to 400
\r
466 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0x40);
\r
468 // turn off write protect
\r
469 outport(CRTC_ADDR,0x2C11);
\r
471 outport(CRTC_ADDR,0x6B00);
\r
472 outport(CRTC_ADDR,0x5901);
\r
473 outport(CRTC_ADDR,0x5A02);
\r
474 outport(CRTC_ADDR,0x8E03);
\r
475 outport(CRTC_ADDR,0x5E04);
\r
476 outport(CRTC_ADDR,0x8A05);
\r
477 outport(CRTC_ADDR,0x0008);
\r
478 outport(CRTC_ADDR,0xC009);
\r
479 outport(CRTC_ADDR,0x000A);
\r
480 outport(CRTC_ADDR,0x000B);
\r
481 outport(CRTC_ADDR,0x000C);
\r
482 outport(CRTC_ADDR,0x000D);
\r
483 outport(CRTC_ADDR,0x000E);
\r
484 outport(CRTC_ADDR,0x000F);
\r
485 outport(CRTC_ADDR,0xAC11);
\r
486 outport(CRTC_ADDR,0x2D13);
\r
487 outport(CRTC_ADDR,0x0014);
\r
488 outport(CRTC_ADDR,0xE317);
\r
489 outport(CRTC_ADDR,0xFF18);
\r
494 Mode.width_bytes = 18000u;
\r
496 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
498 else if (mode == MODE_E) // unchained 360 x 240 x 256
\r
500 SetMode((unsigned int)&mode13h);
\r
502 // Turn off Chain 4
\r
503 outport(SEQ_ADDR,0x0604);
\r
504 // Activate a synchronous reset
\r
505 outport(SEQ_ADDR,0x0100);
\r
506 // Select 28 mhz pixel clock
\r
507 outportb(MISC_ADDR,0xE7);
\r
508 // Release synchronous reset
\r
509 outport(SEQ_ADDR,0x0300);
\r
511 // change the vertical resolution flags to 480
\r
512 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0xC0);
\r
514 // turn off write protect
\r
515 outport(CRTC_ADDR,0x2C11);
\r
517 outport(CRTC_ADDR,0x6B00);
\r
518 outport(CRTC_ADDR,0x5901);
\r
519 outport(CRTC_ADDR,0x5A02);
\r
520 outport(CRTC_ADDR,0x8E03);
\r
521 outport(CRTC_ADDR,0x5E04);
\r
522 outport(CRTC_ADDR,0x8A05);
\r
523 outport(CRTC_ADDR,0x0D06);
\r
524 outport(CRTC_ADDR,0x3E07);
\r
525 outport(CRTC_ADDR,0x0008);
\r
526 outport(CRTC_ADDR,0xC009);
\r
527 outport(CRTC_ADDR,0x000A);
\r
528 outport(CRTC_ADDR,0x000B);
\r
529 outport(CRTC_ADDR,0x000C);
\r
530 outport(CRTC_ADDR,0x000D);
\r
531 outport(CRTC_ADDR,0x000E);
\r
532 outport(CRTC_ADDR,0x000F);
\r
533 outport(CRTC_ADDR,0xEA10);
\r
534 outport(CRTC_ADDR,0xAC11);
\r
535 outport(CRTC_ADDR,0xDF12);
\r
536 outport(CRTC_ADDR,0x2D13);
\r
537 outport(CRTC_ADDR,0x0014);
\r
538 outport(CRTC_ADDR,0xE715);
\r
539 outport(CRTC_ADDR,0x0616);
\r
540 outport(CRTC_ADDR,0xE317);
\r
541 outport(CRTC_ADDR,0xFF18);
\r
546 Mode.width_bytes = 21600;
\r
548 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
550 else if (mode == MODE_F) // unchained 360 x 350 x 256
\r
552 SetMode((unsigned int)&mode13h);
\r
554 // Turn off Chain 4
\r
555 outport(SEQ_ADDR,0x0604);
\r
556 // Activate a synchronous reset
\r
557 outport(SEQ_ADDR,0x0100);
\r
558 // Select 28 mhz pixel clock
\r
559 outportb(MISC_ADDR,0xE7);
\r
560 // Release synchronous reset
\r
561 outport(SEQ_ADDR,0x0300);
\r
563 // change the vertical resolution flags to 350
\r
564 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0x80);
\r
566 // turn off write protect
\r
567 outport(CRTC_ADDR,0x2C11);
\r
569 outport(CRTC_ADDR,0x6B00);
\r
570 outport(CRTC_ADDR,0x5901);
\r
571 outport(CRTC_ADDR,0x5A02);
\r
572 outport(CRTC_ADDR,0x8E03);
\r
573 outport(CRTC_ADDR,0x5E04);
\r
574 outport(CRTC_ADDR,0x8A05);
\r
575 outport(CRTC_ADDR,0xBF06);
\r
576 outport(CRTC_ADDR,0x1F07);
\r
577 outport(CRTC_ADDR,0x0008);
\r
578 outport(CRTC_ADDR,0x4009);
\r
579 outport(CRTC_ADDR,0x000A);
\r
580 outport(CRTC_ADDR,0x000B);
\r
581 outport(CRTC_ADDR,0x000C);
\r
582 outport(CRTC_ADDR,0x000D);
\r
583 outport(CRTC_ADDR,0x000E);
\r
584 outport(CRTC_ADDR,0x000F);
\r
585 outport(CRTC_ADDR,0x8310);
\r
586 outport(CRTC_ADDR,0x8511);
\r
587 outport(CRTC_ADDR,0x5D12);
\r
588 outport(CRTC_ADDR,0x2D13);
\r
589 outport(CRTC_ADDR,0x0014);
\r
590 outport(CRTC_ADDR,0x6315);
\r
591 outport(CRTC_ADDR,0xBA16);
\r
592 outport(CRTC_ADDR,0xE317);
\r
593 outport(CRTC_ADDR,0xFF18);
\r
598 Mode.width_bytes = 31500;
\r
600 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
602 else if (mode == MODE_G) // unchained 360 x 400 x 256
\r
604 SetMode((unsigned int)&mode13h);
\r
606 // Turn off Chain 4
\r
607 outport(SEQ_ADDR,0x0604);
\r
608 // Activate a synchronous reset
\r
609 outport(SEQ_ADDR,0x0100);
\r
610 // Select 28 mhz pixel clock
\r
611 outportb(MISC_ADDR,0xE7);
\r
612 // Release synchronous reset
\r
613 outport(SEQ_ADDR,0x0300);
\r
615 // change the vertical resolution flags to 400
\r
616 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0x40);
\r
618 // turn off write protect
\r
619 outport(CRTC_ADDR,0x2C11);
\r
621 outport(CRTC_ADDR,0x6B00);
\r
622 outport(CRTC_ADDR,0x5901);
\r
623 outport(CRTC_ADDR,0x5A02);
\r
624 outport(CRTC_ADDR,0x8E03);
\r
625 outport(CRTC_ADDR,0x5E04);
\r
626 outport(CRTC_ADDR,0x8A05);
\r
627 outport(CRTC_ADDR,0x0008);
\r
628 outport(CRTC_ADDR,0x4009);
\r
629 outport(CRTC_ADDR,0x000A);
\r
630 outport(CRTC_ADDR,0x000B);
\r
631 outport(CRTC_ADDR,0x000C);
\r
632 outport(CRTC_ADDR,0x000D);
\r
633 outport(CRTC_ADDR,0x000E);
\r
634 outport(CRTC_ADDR,0x000F);
\r
635 outport(CRTC_ADDR,0xAC11);
\r
636 outport(CRTC_ADDR,0x2D13);
\r
637 outport(CRTC_ADDR,0x0014);
\r
638 outport(CRTC_ADDR,0xE317);
\r
639 outport(CRTC_ADDR,0xFF18);
\r
644 Mode.width_bytes = 36000u;
\r
646 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
648 else if (mode == MODE_H) // unchained 360 x 480 x 256
\r
650 SetMode((unsigned int)&mode13h);
\r
652 // Turn off Chain 4
\r
653 outport(SEQ_ADDR,0x0604);
\r
654 // Activate a synchronous reset
\r
655 outport(SEQ_ADDR,0x0100);
\r
656 // Select 28 mhz pixel clock
\r
657 outportb(MISC_ADDR,0xE7);
\r
658 // Release synchronous reset
\r
659 outport(SEQ_ADDR,0x0300);
\r
661 // change the vertical resolution flags to 480
\r
662 outportb(MISC_ADDR,(inportb(0x3CC) & ~0xC0) | 0xC0);
\r
664 // turn off write protect
\r
665 outport(CRTC_ADDR,0x2C11);
\r
667 outport(CRTC_ADDR,0x6B00);
\r
668 outport(CRTC_ADDR,0x5901);
\r
669 outport(CRTC_ADDR,0x5A02);
\r
670 outport(CRTC_ADDR,0x8E03);
\r
671 outport(CRTC_ADDR,0x5E04);
\r
672 outport(CRTC_ADDR,0x8A05);
\r
673 outport(CRTC_ADDR,0x0D06);
\r
674 outport(CRTC_ADDR,0x3E07);
\r
675 outport(CRTC_ADDR,0x0008);
\r
676 outport(CRTC_ADDR,0x4009);
\r
677 outport(CRTC_ADDR,0x000A);
\r
678 outport(CRTC_ADDR,0x000B);
\r
679 outport(CRTC_ADDR,0x000C);
\r
680 outport(CRTC_ADDR,0x000D);
\r
681 outport(CRTC_ADDR,0x000E);
\r
682 outport(CRTC_ADDR,0x000F);
\r
683 outport(CRTC_ADDR,0xEA10);
\r
684 outport(CRTC_ADDR,0xAC11);
\r
685 outport(CRTC_ADDR,0xDF12);
\r
686 outport(CRTC_ADDR,0x2D13);
\r
687 outport(CRTC_ADDR,0x0014);
\r
688 outport(CRTC_ADDR,0xE715);
\r
689 outport(CRTC_ADDR,0x0616);
\r
690 outport(CRTC_ADDR,0xE317);
\r
691 outport(CRTC_ADDR,0xFF18);
\r
696 Mode.width_bytes = 43200u;
\r
698 Mode.attrib = TVU_GRAPHICS | TVU_UNCHAINED;
\r
700 else if (mode == MODE_I) // 640 x 400 x 16
\r
702 SetMode((unsigned int)&mode10h);
\r
732 Mode.width_bytes = 32000;
\r
734 Mode.attrib = TVU_GRAPHICS | TVU_PLANAR;
\r
736 else if (mode == MODE_J) // 80 x 43 x 16
\r
738 SetMode((unsigned int)&modeJ);
\r
743 Mode.width_bytes = 3440;
\r
745 Mode.attrib = TVU_TEXT;
\r
747 else if (mode == MODE_K) // 80 x 50 x 16
\r
749 SetMode((unsigned int)&modeK);
\r
754 Mode.width_bytes = 4000;
\r
756 Mode.attrib = TVU_TEXT;
\r
758 else if (mode == MODE_L) // 40 x 43 x 16
\r
760 SetMode((unsigned int)&modeL);
\r
765 Mode.width_bytes = 4000;
\r
767 Mode.attrib = TVU_TEXT;
\r
769 else if (mode == MODE_M) // 40 x 50 x 16
\r
771 SetMode((unsigned int)&modeM);
\r
776 Mode.width_bytes = 4000;
\r
778 Mode.attrib = TVU_TEXT;
\r
782 void setpal(int color, char r, char g, char b)
\r
809 setpal( 0, 0, 0, 0);
\r
810 setpal( 1, 0, 42, 42);
\r
811 setpal( 2, 42, 0, 42);
\r
812 setpal( 3, 63, 63, 63);
\r
815 void setpalette16()
\r
818 for (int i = 0; i < 48; i+=3)
\r
820 setpal(j, Pal[i], Pal[i+1], Pal[i+2]);
\r
825 void setpalette256()
\r
828 for (int i = 0; i < 768; i+=3)
\r
830 setpal(j, Pal[i], Pal[i+1], Pal[i+2]);
\r