-\r
- vga_write_crtc_mode(&cm,0);\r
- }\r
- break;\r
- case 2:\r
- CRTParmCount = sizeof(ModeX_160x120regs) / sizeof(ModeX_160x120regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=120;\r
- gv->video.page[0].sh=160;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_160x120regs[i]);\r
- }\r
- break;\r
- case 3:\r
- CRTParmCount = sizeof(ModeX_320x200regs) / sizeof(ModeX_320x200regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=320;\r
- gv->video.page[0].sh=200;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_320x200regs[i]);\r
- }\r
- break;\r
- case 4:\r
- CRTParmCount = sizeof(ModeX_192x144regs) / sizeof(ModeX_192x144regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=192;\r
- gv->video.page[0].sh=144;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_192x144regs[i]);\r
- }\r
- break;\r
- case 5:\r
- CRTParmCount = sizeof(ModeX_256x192regs) / sizeof(ModeX_256x192regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=256;\r
- gv->video.page[0].sh=192;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_256x192regs[i]);\r
- }\r
- break;\r
+ cm.clock_select = 0; /* misc register = 0xE3 25MHz */\r
+ cm.vsync_neg = 1;\r
+ cm.hsync_neg = 1;\r
+ cm.offset = (vga_state.vga_width / (4 * 2)); // 320 wide (40 x 4 pixel groups x 2)\r
+ break;\r
+ case 2: // TODO: 160x120 according to ModeX_160x120regs\r
+ return;\r
+ case 3: // TODO: 160x120 according to ModeX_320x200regs\r
+ return;\r
+ case 4: // TODO: 160x120 according to ModeX_192x144regs\r
+ return;\r
+ case 5: // TODO: 160x120 according to ModeX_256x192regs\r
+ return;\r
+ default:\r
+ return;\r