--- /dev/null
+; ====================================================================\r
+; Entry points:\r
+; ====================================================================\r
+MODEX_START MACRO\r
+ mov ax,13h ;let the BIOS set standard 256-color\r
+ int 10h ; mode (320x200 linear)\r
+; PALETTE_BLACK\r
+ call ModifyForX\r
+ ENDM\r
+\r
+; ====================================================================\r
+; This is MODE-X code from Dr. Dobb's Journal, by Michael Abrash.\r
+; I modified it from 320x240 back to 320x200, and then to 512 virtual\r
+; width, for scrolling purposes.\r
+; ====================================================================\r
+\r
+; Mode X (320x240, 256 colors) mode set routine. Works on all VGAs.\r
+; ****************************************************************\r
+; * Revised 6/19/91 to select correct clock; fixes vertical roll *\r
+; * problems on fixed-frequency (IBM 851X-type) monitors. *\r
+; ****************************************************************\r
+; Modified from public-domain mode set code by John Bridges.\r
+\r
+; Index/data pairs for CRT Controller registers that differ between\r
+; mode 13h and mode X.\r
+CRTParms label word\r
+; dw 00d06h ;vertical total\r
+; dw 03e07h ;overflow (bit 8 of vertical counts)\r
+; dw 04109h ;cell height (2 to double-scan)\r
+; dw 0ea10h ;v sync start\r
+; dw 0ac11h ;v sync end and protect cr0-cr7\r
+; dw 0df12h ;vertical displayed = 480\r
+ dw 00014h ;turn off dword mode *\r
+; dw 0e715h ;v blank start\r
+; dw 00616h ;v blank end\r
+ dw 0e317h ;turn on byte mode *\r
+\r
+ dw (VIRTUAL_WIDTH*32)+13h ; width of screen = VWid NEW\r
+; dw 09012h ;vertical displayed = 400 (already like this)\r
+CRT_PARM_LENGTH equ (($-CRTParms)/2)\r
+\r
+ModifyForX PROC near\r
+ mov dx,SC_INDEX\r
+ mov ax,0604h\r
+ out dx,ax ;disable chain4 mode\r
+ mov ax,0100h\r
+ out dx,ax ;synchronous reset while setting Misc\r
+ ; Output for safety, even though clock\r
+ ; unchanged\r
+ mov dx,MISC_OUTPUT\r
+ mov al,0e3h\r
+ out dx,al ;select 25 MHz dot clock & 60 Hz scanning rate\r
+\r
+ mov dx,SC_INDEX\r
+ mov ax,0300h\r
+ out dx,ax ;undo reset (restart sequencer)\r
+\r
+ mov dx,CRTC_INDEX ;reprogram the CRT Controller\r
+ mov al,11h ;VSync End reg contains register write\r
+ out dx,al ; protect bit\r
+ inc dx ;CRT Controller Data register\r
+ in al,dx ;get current VSync End register setting\r
+ and al,7fh ;remove write protect on various\r
+ out dx,al ; CRTC registers\r
+ dec dx ;CRT Controller Index\r
+ cld\r
+ push cs\r
+ pop ds\r
+ mov si,offset CRTParms ;point to CRT parameter table\r
+ mov cx,CRT_PARM_LENGTH ;# of table entries\r
+SetCRTParmsLoop:\r
+ lodsw ;get the next CRT Index/Data pair\r
+ out dx,ax ;set the next CRT Index/Data pair\r
+ loop SetCRTParmsLoop\r
+\r
+ mov dx,SC_INDEX\r
+ mov ax,0f02h\r
+ out dx,ax ;enable writes to all four planes\r
+ mov ax,SCREEN_SEG ;now clear all display memory, 8 pixels\r
+ mov es,ax ; at a time\r
+ sub di,di ;point ES:DI to display memory\r
+ sub ax,ax ;clear to zero-value pixels\r
+ mov cx,8000h ;# of words in display memory\r
+ rep stosw ;clear all of display memory\r
+\r
+ ret\r
+ModifyForX ENDP\r
+\1a
\ No newline at end of file