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[16.git] / 16 / tweak16 / REGISTER.CPP

diff --git a/16/tweak16/REGISTER.CPP b/16/tweak16/REGISTER.CPP
deleted file mode 100755 (executable)
index 7cb25bc..0000000
--- a/16/tweak16/REGISTER.CPP
+++ /dev/null
@@ -1,129 +0,0 @@
-/*\r
-       Register.CPP version 1.0\r
-       by Robert Schmidt of Ztiff Zox Softwear 1993\r
-\r
-       Defines the member functions of the Register class declared in\r
-               Register.hpp.\r
-       Defines the stream operators >> and << to read and write register\r
-               info from istreams/to ostreams in *binary* format.\r
-*/\r
-\r
-#include <dos.h>\r
-#include <iostream.h>\r
-#include "Register.hpp"\r
-\r
-\r
-/*\r
-       Register::out()\r
-               Outputs the Register.value to the correct port/index.\r
-               It takes care of handling recognized special cases, like some\r
-               VGA ports, correctly.\r
-*/\r
-\r
-void Register::out()\r
-       {\r
-       switch (port)\r
-               {\r
-               // First handle special cases:\r
-\r
-               case ATTRCON_ADDR:\r
-                       inportb(STATUS_ADDR);           // reset read/write flip-flop\r
-                       outportb(ATTRCON_ADDR, index);\r
-                       outportb(ATTRCON_ADDR, value);\r
-                       break;\r
-\r
-               case SEQ_ADDR:\r
-                       if (index == 1)\r
-                               {\r
-                               // Reset the sequencer if the clock polarity settings\r
-                               //  are being accessed.\r
-                               outport(SEQ_ADDR, 0x0100);\r
-                               outport(SEQ_ADDR, value<<8 | 1);\r
-                               outport(SEQ_ADDR, 0x0300);\r
-                               break;\r
-                               }\r
-               case GRACON_ADDR:\r
-               case CRTC_ADDR:\r
-               case CHIPSTECH:\r
-                       outport(port, index | value<<8);\r
-                       break;\r
-\r
-               case MISC_ADDR:\r
-               case VGAENABLE_ADDR:\r
-               default:                                                // Default is to write the byte\r
-                       outportb(port, value);          //      directly to the port\r
-                       break;\r
-               }\r
-       }\r
-\r
-/*\r
-       Register::in()\r
-               Inputs Register.value to the associated hardware register.\r
-               It takes care of handling recognized special cases,\r
-               like some VGA ports, correctly.\r
-*/\r
-\r
-unsigned char Register::in()\r
-       {\r
-       switch (port)\r
-               {\r
-               // First handle special cases:\r
-\r
-               case MISC_ADDR:\r
-                       value = inportb(0x3cc);         // 0x3c2 is write-only, reading\r
-                                                                               // must be mapped to 0x3cc\r
-                       break;\r
-\r
-               case ATTRCON_ADDR:                              // This 1 is odd.  First do a read to\r
-                       inportb(STATUS_ADDR);           //      reset the index/data flip-flop.\r
-                                                                               //      Then give it the index, but:\r
-                                                                               //      set bit 5!  If cleared, VGA\r
-                                                                               //      output is disabled!\r
-                       outportb(ATTRCON_ADDR, index);\r
-                       value = inportb(ATTRCON_ADDR+1);\r
-                       break;\r
-\r
-               case SEQ_ADDR:                                  // These 3 are similar.  Give it the\r
-               case GRACON_ADDR:                               //      register index, then read the\r
-               case CRTC_ADDR:                                 //      byte from port+1.\r
-               case CHIPSTECH:\r
-                       outportb(port, index);\r
-                       value = inportb(port+1);\r
-                       break;\r
-\r
-               case VGAENABLE_ADDR:\r
-               default:                        // Default is to read the byte\r
-                       value = inportb(port);          //      directly from the port\r
-                       break;\r
-               }\r
-\r
-       return value;                                                   // Return value of first reg.\r
-       }\r
-\r
-/*\r
-       The following stream operators operate on Registers in *binary*\r
-       format, i.e. they are not suitable for communicating with text streams\r
-       like the keyboard or the screen (cin/cout).\r
-*/\r
-\r
-istream& operator>> (istream &in, Register &r)\r
-       {\r
-       r.port = unsigned(in.get()) | (unsigned(in.get()) << 8);\r
-       r.index = in.get();\r
-       r.value = in.get();\r
-\r
-       return in;\r
-       }\r
-\r
-ostream& operator<< (ostream &out, Register &r)\r
-       {\r
-       out.put(char(r.port));\r
-       out.put(char(r.port>>8));\r
-       out.put(r.index);\r
-       out.put(r.value);\r
-\r
-       return out;\r
-       }\r
-\r
-\r
-\r