cm.vertical_display_end = 480;\r
cm.vertical_blank_start = 0x1E7 + 1;\r
cm.vertical_blank_end = 0x206 + 1;\r
+ cm.clock_select = 0; /* misc register = 0xE3 25MHz */\r
+ cm.vsync_neg = 1;\r
+ cm.hsync_neg = 1;\r
\r
vga_write_crtc_mode(&cm,0);\r
}\r
{\r
case 1:\r
/* clear video memory */\r
- outpw(SC_INDEX, 0x0f02);\r
- for(i=0; i<0x8000; i++) {\r
- ptr[i] = 0x0000;\r
- }\r
+ vga_write_sequencer(2/*map mask register*/,0xf/*all 4 planes*/);\r
+ for(i=0; i<0x8000; i++) ptr[i] = 0x0000;\r
break;\r
}\r
gv->video.page[0].tilesw = gv->video.page[0].sw/TILEWH;\r
{\r
/* TODO save current video mode and palette */\r
vgaSetMode(VGA_256_COLOR_MODE);\r
-\r
vga_enable_256color_modex();\r
-\r
- /* disable chain4 mode */\r
- //outpw(SC_INDEX, 0x0604);\r
-\r
- /* synchronous reset while setting Misc Output */\r
- //outpw(SC_INDEX, 0x0100);\r
-\r
- /* select 25 MHz dot clock & 60 Hz scanning rate */\r
- outp(MISC_OUTPUT, 0xe3);\r
-\r
- /* undo reset (restart sequencer) */\r
- //outpw(SC_INDEX, 0x0300);\r
-\r
- /* reprogram the CRT controller */\r
- outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
-// temp = inp(CRTC_DATA) & 0x7F;\r
-// outp(CRTC_INDEX, 0x11);\r
- outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */\r
-// outp(CRTC_DATA, temp); /* get current write protect on varios regs */\r
update_state_from_vga();\r
}\r
\r