\r
vgaSetMode(VGA_256_COLOR_MODE);\r
vga_enable_256color_modex();\r
+ /* reprogram the CRT controller */\r
+// outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
+// outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */\r
update_state_from_vga();\r
vga_read_crtc_mode(&cm);\r
\r
cm.vertical_display_end = 480;\r
cm.vertical_blank_start = 0x1E7 + 1;\r
cm.vertical_blank_end = 0x206 + 1;\r
- cm.clock_select = 0; /* misc register = 0xE3 25MHz */\r
+ cm.clock_select = 1; /* misc register = 0xE3 25MHz */\r
cm.vsync_neg = 1;\r
cm.hsync_neg = 1;\r
cm.offset = (vga_state.vga_width / (4 * 2)); // 320 wide (40 x 4 pixel groups x 2)\r
// (video->page[3]) = modexNextPageFlexibleSize(&(video->page[2]), 72, 128); video->num_of_pages++;\r
modexCalcVmemRemain(video);\r
video->p=0;\r
+ video->r=1;\r
}\r
\r
void\r
\r
void\r
modexWaitBorder() {\r
- while(inp(INPUT_STATUS_1) & 8) {\r
+ while(inp(INPUT_STATUS_1) & 8) {\r
// spin\r
- }\r
+ }\r
\r
-// while(!(inp(INPUT_STATUS_1) & 8)) {\r
-// // spin\r
-// }\r
+ while(!(inp(INPUT_STATUS_1) & 8)) {\r
+ //spin\r
+ }\r
}\r
\r
void bios_cls() {\r