int86(0x10, &in, &out);\r
gv->old_mode = out.h.al;\r
// enter mode\r
- modexEnter();\r
+ modex__320x240_256__Enter(gv);\r
}\r
}\r
\r
\r
/* -========================= Entry Points ==========================- */\r
void\r
-modexEnter() {\r
- word i;\r
- dword far*ptr=(dword far*)VGA; /* used for faster screen clearing */\r
- word CRTParms[] = {\r
+modex__320x240_256__Enter(global_game_variables_t *gv)\r
+{\r
+ word i;\r
+ dword far*ptr=(dword far*)VGA; /* used for faster screen clearing */\r
+ word CRTParms[] = {\r
// 0x5f00, /* horizontal total */\r
// 0x3f01, /* horizontal display enable end */\r
0x0d06, /* vertical total */\r
0xe715, /* v blank start */\r
0x0616, /* v blank end */\r
0xe317 /* turn on byte mode */\r
- };\r
- int CRTParmCount = sizeof(CRTParms) / sizeof(CRTParms[0]);\r
+ };\r
\r
- /* TODO save current video mode and palette */\r
- vgaSetMode(VGA_256_COLOR_MODE);\r
+ int CRTParmCount = sizeof(CRTParms) / sizeof(CRTParms[0]);\r
+ /* width and height */\r
+ //TODO WWWW\r
\r
- /* disable chain4 mode */\r
- outpw(SC_INDEX, 0x0604);\r
+ /* TODO save current video mode and palette */\r
+ vgaSetMode(VGA_256_COLOR_MODE);\r
\r
- /* synchronous reset while setting Misc Output */\r
- outpw(SC_INDEX, 0x0100);\r
+ /* disable chain4 mode */\r
+ outpw(SC_INDEX, 0x0604);\r
\r
- /* select 25 MHz dot clock & 60 Hz scanning rate */\r
- outp(MISC_OUTPUT, 0xe3);\r
+ /* synchronous reset while setting Misc Output */\r
+ outpw(SC_INDEX, 0x0100);\r
\r
- /* undo reset (restart sequencer) */\r
- outpw(SC_INDEX, 0x0300);\r
+ /* select 25 MHz dot clock & 60 Hz scanning rate */\r
+ outp(MISC_OUTPUT, 0xe3);\r
\r
- /* reprogram the CRT controller */\r
- outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
- outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */\r
+ /* undo reset (restart sequencer) */\r
+ outpw(SC_INDEX, 0x0300);\r
\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, CRTParms[i]);\r
- }\r
+ /* reprogram the CRT controller */\r
+ outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
+ outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */\r
\r
- /* clear video memory */\r
- outpw(SC_INDEX, 0x0f02);\r
- for(i=0; i<0x8000; i++) {\r
- ptr[i] = 0x0000;\r
- }\r
+ /* send the CRTParms */\r
+ for(i=0; i<CRTParmCount; i++) {\r
+ outpw(CRTC_INDEX, CRTParms[i]);\r
+ }\r
+\r
+ /* clear video memory */\r
+ outpw(SC_INDEX, 0x0f02);\r
+ for(i=0; i<0x8000; i++) {\r
+ ptr[i] = 0x0000;\r
+ }\r
}\r
\r
\r