static void\r
vgaSetMode(byte mode)\r
{\r
- union REGS regs;\r
-\r
- regs.h.ah = SET_MODE;\r
- regs.h.al = mode;\r
- int86(VIDEO_INT, ®s, ®s);\r
+ int10_setmode(mode);\r
}\r
\r
//---------------------------------------------------\r
// Use the bios to get the current video mode\r
//\r
\r
-long\r
+byte/*FIXME: why long? "long" is 32-bit datatype, VGA modes are 8-bit numbers. */\r
vgaGetMode()\r
{\r
- union REGS rg;\r
-\r
- rg.h.ah = 0x0f;\r
- int86(VIDEO_INT, &rg, &rg);\r
-\r
- return rg.h.al;\r
+ return int10_getmode();\r
}\r
\r
/* -========================= Entry Points ==========================- */\r
void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)\r
{\r
word i;\r
- dword far*ptr=(dword far*)VGA; /* used for faster screen clearing */\r
+ dword far*ptr=(dword far*)vga_state.vga_graphics_ram;//VGA; /* used for faster screen clearing */\r
+ struct vga_mode_params cm;\r
int CRTParmCount;\r
- /* common mode X initiation stuff~ */\r
- modexsetBaseXMode();\r
+\r
+ vgaSetMode(VGA_256_COLOR_MODE);\r
+ vga_enable_256color_modex();\r
+ update_state_from_vga();\r
+ vga_read_crtc_mode(&cm);\r
\r
switch(vq)\r
{\r
case 1:\r
//CRTParmCount = sizeof(ModeX_320x240regs) / sizeof(ModeX_320x240regs[0]);\r
/* width and height */\r
- gv->video.page[0].sw=vga_state.vga_width = 320; // VGA lib currently does not update this\r
- gv->video.page[0].sh=vga_state.vga_height = 240; // VGA lib currently does not update this\r
-\r
- /* send the CRTParms */\r
- /*for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_320x240regs[i]);\r
- }*/\r
- {\r
- struct vga_mode_params cm;\r
- vga_read_crtc_mode(&cm);\r
-\r
-// 0x5f00, /* Horizontal total */\r
-// 0x4f01, /* horizontal display enable end */\r
-// 0x5002, /* Start horizontal blanking */\r
-// 0x8203, /* End horizontal blanking */\r
-// 0x5404, /* Start horizontal retrace */\r
-// 0x8005, /* End horizontal retrace */\r
-// 0x0d06, /* vertical total */\r
-// 0x3e07, /* overflow (bit 8 of vertical counts) */\r
-// 0x4109, /* cell height (2 to double-scan */\r
-// 0xea10, /* v sync start */\r
-// 0xac11, /* v sync end and protect cr0-cr7 */\r
-// 0xdf12, /* vertical displayed */\r
-// 0x2813, /* offset/logical width */\r
-// 0x0014, /* turn off dword mode */\r
-// 0xe715, /* v blank start */\r
-// 0x0616, /* v blank end */\r
-// 0xe317 /* turn on byte mode */\r
+ gv->video.page[0].sw = vga_state.vga_width = 320; // VGA lib currently does not update this\r
+ gv->video.page[0].sh = vga_state.vga_height = 240; // VGA lib currently does not update this\r
\r
+ // mode X BYTE mode\r
+ cm.word_mode = 0;\r
+ cm.dword_mode = 0;\r
// 320x240 mode 60Hz\r
cm.horizontal_total=0x5f + 5; /* CRTC[0] -5 */\r
cm.horizontal_display_end=0x4f + 1; /* CRTC[1] -1 */\r
cm.vertical_display_end = 480;\r
cm.vertical_blank_start = 0x1E7 + 1;\r
cm.vertical_blank_end = 0x206 + 1;\r
-\r
- vga_write_crtc_mode(&cm,0);\r
- }\r
- break;\r
- case 2:\r
- CRTParmCount = sizeof(ModeX_160x120regs) / sizeof(ModeX_160x120regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=120;\r
- gv->video.page[0].sh=160;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_160x120regs[i]);\r
- }\r
- break;\r
- case 3:\r
- CRTParmCount = sizeof(ModeX_320x200regs) / sizeof(ModeX_320x200regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=320;\r
- gv->video.page[0].sh=200;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_320x200regs[i]);\r
- }\r
- break;\r
- case 4:\r
- CRTParmCount = sizeof(ModeX_192x144regs) / sizeof(ModeX_192x144regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=192;\r
- gv->video.page[0].sh=144;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_192x144regs[i]);\r
- }\r
- break;\r
- case 5:\r
- CRTParmCount = sizeof(ModeX_256x192regs) / sizeof(ModeX_256x192regs[0]);\r
- /* width and height */\r
- gv->video.page[0].sw=256;\r
- gv->video.page[0].sh=192;\r
-\r
- /* send the CRTParms */\r
- for(i=0; i<CRTParmCount; i++) {\r
- outpw(CRTC_INDEX, ModeX_256x192regs[i]);\r
- }\r
- break;\r
+ cm.clock_select = 0; /* misc register = 0xE3 25MHz */\r
+ cm.vsync_neg = 1;\r
+ cm.hsync_neg = 1;\r
+ cm.offset = (vga_state.vga_width / (4 * 2)); // 320 wide (40 x 4 pixel groups x 2)\r
+ break;\r
+ case 2: // TODO: 160x120 according to ModeX_160x120regs\r
+ return;\r
+ case 3: // TODO: 160x120 according to ModeX_320x200regs\r
+ return;\r
+ case 4: // TODO: 160x120 according to ModeX_192x144regs\r
+ return;\r
+ case 5: // TODO: 160x120 according to ModeX_256x192regs\r
+ return;\r
+ default:\r
+ return;\r
}\r
\r
+ vga_state.vga_stride = cm.offset * 2;\r
+ vga_write_crtc_mode(&cm,0);\r
+\r
/* clear video memory */\r
switch (cmem)\r
{\r
case 1:\r
/* clear video memory */\r
- outpw(SC_INDEX, 0x0f02);\r
- for(i=0; i<0x8000; i++) {\r
- ptr[i] = 0x0000;\r
- }\r
+ vga_write_sequencer(2/*map mask register*/,0xf/*all 4 planes*/);\r
+ for(i=0; i<0x8000; i++) ptr[i] = 0x0000;\r
break;\r
}\r
gv->video.page[0].tilesw = gv->video.page[0].sw/TILEWH;\r
vgaSetMode(TEXT_MODE);\r
}\r
\r
-// setBaseXMode() does the initialization to make the VGA ready to\r
-// accept any combination of configuration register settings. This\r
-// involves enabling writes to index 0 to 7 of the CRT controller (port\r
-// 0x3D4), by clearing the most significant bit (bit 7) of index 0x11.\r
-void\r
-modexsetBaseXMode()\r
-{\r
- /* TODO save current video mode and palette */\r
- vgaSetMode(VGA_256_COLOR_MODE);\r
-\r
- vga_enable_256color_modex();\r
-\r
- /* disable chain4 mode */\r
- //outpw(SC_INDEX, 0x0604);\r
-\r
- /* synchronous reset while setting Misc Output */\r
- //outpw(SC_INDEX, 0x0100);\r
-\r
- /* select 25 MHz dot clock & 60 Hz scanning rate */\r
- outp(MISC_OUTPUT, 0xe3);\r
-\r
- /* undo reset (restart sequencer) */\r
- //outpw(SC_INDEX, 0x0300);\r
-\r
- /* reprogram the CRT controller */\r
- outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
-// temp = inp(CRTC_DATA) & 0x7F;\r
-// outp(CRTC_INDEX, 0x11);\r
- outp(CRTC_DATA, 0x7f); /* get current write protect on varios regs */\r
-// outp(CRTC_DATA, temp); /* get current write protect on varios regs */\r
- update_state_from_vga();\r
-}\r
-\r
page_t\r
modexDefaultPage(page_t *p)\r
{\r
page_t page;\r
\r
/* default page values */\r
- page.data = VGA;\r
+ page.data = vga_state.vga_graphics_ram;//VGA;\r
page.dx = 0;\r
page.dy = 0;\r
page.sw = p->sw;\r
static word a[PAL_SIZE]; //palette array of change values!\r
word z=0, aq=0, aa=0, pp=0;\r
\r
- modexWaitBorder();\r
+ //modexWaitBorder();\r
+ vga_wait_for_vsync();\r
if((*i)==0)\r
{\r
memset(a, -1, sizeof(a));\r
//if(qp>0) printf("qp=%d\n", qp);\r
//if(qp>0) printf(" (*i)=%d\n", (*i)/3);\r
}\r
- modexWaitBorder(); /* waits one retrace -- less flicker */\r
+ //modexWaitBorder(); /* waits one retrace -- less flicker */\r
+ vga_wait_for_vsync();\r
if((*i)>=PAL_SIZE/2 && w==0)\r
{\r
for(; (*i)<PAL_SIZE; (*i)++)\r
pp = q;\r
//printf("1(*i)=%02d\n", (*i)/3);\r
//printf("1z=%02d\n", z/3);\r
- chkcolor(bmp, &q, &a, &aa, &z, i);\r
+ modexchkcolor(bmp, &q, &a, &aa, &z, i);\r
//printf("2(*i)=%02d\n", (*i)/3);\r
//printf("2z=%02d\n", z/3);\r
aq=0;\r
modexPalUpdate1(byte *p)\r
{\r
int i;\r
- modexWaitBorder();\r
+ //modexWaitBorder();\r
+ vga_wait_for_vsync();\r
outp(PAL_WRITE_REG, 0); /* start at the beginning of palette */\r
for(i=0; i<PAL_SIZE/2; i++)\r
{\r
outp(PAL_DATA_REG, p[i]);\r
}\r
- modexWaitBorder(); /* waits one retrace -- less flicker */\r
+ //modexWaitBorder(); /* waits one retrace -- less flicker */\r
+ vga_wait_for_vsync();\r
for(; i<PAL_SIZE; i++)\r
{\r
outp(PAL_DATA_REG, p[(i)]);\r
modexPalUpdate0(byte *p)\r
{\r
int i;\r
- modexWaitBorder();\r
+ //modexWaitBorder();\r
+ vga_wait_for_vsync();\r
outp(PAL_WRITE_REG, 0); /* start at the beginning of palette */\r
for(i=0; i<PAL_SIZE/2; i++)\r
{\r
outp(PAL_DATA_REG, rand());\r
}\r
- modexWaitBorder(); /* waits one retrace -- less flicker */\r
+ //modexWaitBorder(); /* waits one retrace -- less flicker */\r
+ vga_wait_for_vsync();\r
for(; i<PAL_SIZE; i++)\r
{\r
outp(PAL_DATA_REG, rand());\r
void\r
modexPalOverscan(byte *p, word col)\r
{\r
- modexWaitBorder();\r
+ //modexWaitBorder();\r
+ vga_wait_for_vsync();\r
outp(PAL_WRITE_REG, 0); /* start at the beginning of palette */\r
outp(PAL_DATA_REG, col);\r
}\r
\r
//color checker~\r
//i want to make another vesion that checks the palette when the palette is being appened~\r
-void chkcolor(bitmap_t *bmp, word *q, word *a, word *aa, word *z, word *i/*, word *offset*/)\r
+void modexchkcolor(bitmap_t *bmp, word *q, word *a, word *aa, word *z, word *i/*, word *offset*/)\r
{\r
byte *pal;\r
word zz=0;\r
\r
}\r
\r
-void modexhlin(page_t *page, word xl, word xh, word y, word color)\r
-{\r
- word x;\r
- word yy=0;\r
-\r
- for(x=0;x<xh*4;x+=4)\r
- {\r
- if(x+4>=page[0].sw-1){ x=0; yy+=4; }\r
- modexClearRegion(page, x+xl, y+yy, 4, 4, color);\r
- }\r
- //modexputPixel(page, x+xl, y, color);\r
-}\r
-\r
-void modexprint(page_t *page, word x, word y, word t, word col, word bgcol, const byte *str, boolean q)\r
+void modexprint(page_t *page, word x, word y, word t, word col, word bgcol, const byte *str)\r
{\r
word s, o, w;\r
word addr = (word) romFontsData.l;\r
+ word addrq = (page->width/4) * y + (x / 4) + ((word)page->data);\r
byte c;\r
\r
s=romFonts[t].seg;\r
JNZ L1\r
}\r
//TODO: OPTIMIZE THIS!!!!\r
- modexDrawCharPBuf(page, x, y, t, col, bgcol, q);\r
+ modexDrawCharPBuf(page, x/*for mode X planar use*/, y/*redunant, remove*/, t, col, bgcol, addrq);\r
+ addrq += 2; /* move 8 pixels over (2 x 4 planar pixels per byte) */\r
\r
//if(!q) getch();\r
}\r
}\r
\r
/* palette dump on display! */\r
-void pdump(page_t *pee)\r
+void modexpdump(page_t *pee)\r
{\r
int mult=(QUADWH);\r
int palq=(mult)*TILEWH;\r
// the Virtual screen. //\r
// //\r
/////////////////////////////////////////////////////////////////////////////\r
-void cls(page_t *page, byte color, byte *Where)\r
+void modexcls(page_t *page, byte color, byte *Where)\r
{\r
//modexClearRegion(page, 0, 0, page->width, page->height, color);\r
/* set map mask to all 4 planes */\r
_fmemset(Where, color, page->width*(page->height)/4);\r
}\r
\r
-void\r
+/*void\r
modexWaitBorder() {\r
while(inp(INPUT_STATUS_1) & 8) {\r
- /* spin */\r
+ // spin\r
}\r
\r
while(!(inp(INPUT_STATUS_1) & 8)) {\r
- /* spin */\r
+ // spin\r
}\r
+}*/\r
+\r
+void bios_cls() {\r
+ VGA_ALPHA_PTR ap;\r
+ VGA_RAM_PTR rp;\r
+ unsigned char m;\r
+\r
+ m = int10_getmode();\r
+ if ((rp=vga_state.vga_graphics_ram) != NULL && !(m <= 3 || m == 7)) {\r
+ unsigned int i,im;\r
+\r
+ im = (FP_SEG(vga_state.vga_graphics_ram_fence) - FP_SEG(vga_state.vga_graphics_ram));\r
+ if (im > 0xFFE) im = 0xFFE;\r
+ im <<= 4;\r
+ for (i=0;i < im;i++) vga_state.vga_graphics_ram[i] = 0;\r
+ }\r
+ else if ((ap=vga_state.vga_alpha_ram) != NULL) {\r
+ unsigned int i,im;\r
+\r
+ im = (FP_SEG(vga_state.vga_alpha_ram_fence) - FP_SEG(vga_state.vga_alpha_ram));\r
+ if (im > 0x7FE) im = 0x7FE;\r
+ im <<= 4 - 1; /* because ptr is type uint16_t */\r
+ for (i=0;i < im;i++) vga_state.vga_alpha_ram[i] = 0x0720;\r
+ }\r
+ else {\r
+ printf("WARNING: bios cls no ptr\n");\r
+ }\r
}\r
projects / 16.git / blobdiff