vgaSetMode(VGA_256_COLOR_MODE);\r
vga_enable_256color_modex();\r
\r
- update_state_from_vga_();\r
+ update_state_from_vga();\r
vga_read_crtc_mode(&cm);\r
\r
/* reprogram the CRT controller */\r
cm.horizontal_total=0x5f + 5; /* CRTC[0] -5 */\r
cm.horizontal_display_end=0x4f + 1; /* CRTC[1] -1 */\r
cm.horizontal_blank_start=0x50 + 1; /* CRTC[2] */\r
- cm.horizontal_blank_end=0x82 + 1; /* CRTC[3] bit 0-4 & CRTC[5] bit 7 *///skewing ^^;\r
+// cm.horizontal_blank_end=0x82 + 1; /* CRTC[3] bit 0-4 & CRTC[5] bit 7 *///skewing ^^;\r
cm.horizontal_start_retrace=0x54;/* CRTC[4] */\r
cm.horizontal_end_retrace=0x80; /* CRTC[5] bit 0-4 */\r
//cm.horizontal_start_delay_after_total=0x3e; /* CRTC[3] bit 5-6 */\r
page.tilemidposscreeny = (page.th/2)+1;\r
page.stridew=page.width/4;\r
page.pagesize = (word)(page.width/4)*page.height;\r
+ page.pi=page.width*4;\r
page.id = 0;\r
\r
return page;\r
result.th = p->th;\r
result.tilesw = p->tilesw;\r
result.tilesh = p->tilesh;\r
- result.id = p->id+1;\r
result.stridew=p->stridew;\r
result.pagesize = p->pagesize;\r
+ result.pi=result.width*4;\r
+ result.id = p->id+1;\r
\r
return result;\r
}\r
result.tilesw=result.width/TILEWH;\r
result.tilesh=result.height/TILEWH;\r
result.id = p->id+1;\r
- result.stridew=result.width/4;\r
+ result.stridew=p->sw/4;//result.width/4;\r
result.pagesize = (word)(result.width/4)*result.height;\r
+ switch(result.id)\r
+ {\r
+ case 2:\r
+ result.pi=p->width*4;\r
+ break;\r
+ case 3:\r
+ result.pi=p->pi;\r
+ break;\r
+ }\r
\r
return result;\r
}\r
video->num_of_pages=0;\r
(video->page[0]) = modexDefaultPage(&(video->page[0])); video->num_of_pages++; //video->page[0].width += (TILEWHD); video->page[0].height += (TILEWHD);\r
(video->page[1]) = modexNextPage(&(video->page[0])); video->num_of_pages++;\r
+//0000 (video->page[2]) = modexNextPageFlexibleSize(&(video->page[1]), (video->page[0]).width, TILEWH*4); video->num_of_pages++;\r
+//0000 (video->page[3]) = (video->page[2]); video->num_of_pages++;\r
(video->page[2]) = modexNextPageFlexibleSize(&(video->page[1]), TILEWH*4, TILEWH*4); video->num_of_pages++;\r
+// (video->page[3]) = modexNextPageFlexibleSize(&(video->page[2]), video->page[0].width, 176); video->num_of_pages++;\r
(video->page[3]) = modexNextPageFlexibleSize(&(video->page[2]), video->page[0].sw, 208); video->num_of_pages++;\r
// (video->page[2]) = modexNextPageFlexibleSize(&(video->page[1]), video->page[0].width, 172); video->num_of_pages++;\r
// (video->page[3]) = modexNextPageFlexibleSize(&(video->page[2]), 72, 128); video->num_of_pages++;\r
low_address = LOW_ADDRESS | (offset << 8);\r
\r
/* wait for appropriate timing and then program CRTC */\r
- while ((inp(INPUT_STATUS_1) & DISPLAY_ENABLE));\r
+ //while ((inp(INPUT_STATUS_1) & DISPLAY_ENABLE));\r
outpw(CRTC_INDEX, high_address);\r
outpw(CRTC_INDEX, low_address);\r
outp(CRTC_INDEX, 0x13);\r
outp(CRTC_DATA, crtcOffset);\r
\r
/* wait for one retrace */\r
- while (!(inp(INPUT_STATUS_1) & VRETRACE));\r
+ //while (!(inp(INPUT_STATUS_1) & VRETRACE));\r
\r
/* do PEL panning here */\r
outp(AC_INDEX, 0x33);\r
right=0x0f;\r
}\r
\r
+ //printf("modexClearRegion(x=%u, y=%u, w=%u, h=%u, left=%u, right=%u)\n", x, y, w, h, left, right);\r
+\r
__asm {\r
PUSHF\r
PUSH ES\r
{\r
word doffset = (word)dest->data + dy*(dest->stridew) + dx/4;\r
word soffset = (word)src->data + sy*(src->stridew) + sx/4;\r
- word scans = vga_state.vga_stride;\r
+ word scans = vga_state.vga_stride; //++++0000 the quick and dirty fix of the major issue with p16 video display wwww\r
word nextSrcRow = src->stridew - scans - 1;\r
word nextDestRow = dest->stridew - scans - 1;\r
byte lclip[] = {0x0f, 0x0e, 0x0c, 0x08}; /* clips for rectangles not on 4s */\r
- byte rclip[] = {0x0f, 0x01, 0x03, 0x07};\r
+ byte rclip[] = {0x00, 0x01, 0x03, 0x07};\r
byte left = lclip[sx&0x03];\r
byte right = rclip[(sx+width)&0x03];\r
\r
+ /* handle the case which requires an extra group */\r
+ if((sx & 0x03) && !((sx+width) & 0x03)) {\r
+ right=0x0f;\r
+ }\r
+\r
+// printf("modexCopyPageRegion(src->stridew=%u, dest->stridew=%u, sx=%u, sy=%u, dx=%u, dy=%u, width=%u, height=%u, left=%u, right=%u)\n", src->stridew, dest->stridew, sx, sy, dx, dy, width, height, left, right);\r
+\r
__asm {\r
PUSHF\r
PUSH ES\r
}\r
}\r
\r
-void bios_cls() {\r
- VGA_ALPHA_PTR ap;\r
- VGA_RAM_PTR rp;\r
- unsigned char m;\r
-\r
- m = int10_getmode();\r
- if ((rp=vga_state.vga_graphics_ram) != NULL && !(m <= 3 || m == 7)) {\r
- unsigned int i,im;\r
-\r
- im = (FP_SEG(vga_state.vga_graphics_ram_fence) - FP_SEG(vga_state.vga_graphics_ram));\r
- if (im > 0xFFE) im = 0xFFE;\r
- im <<= 4;\r
- for (i=0;i < im;i++) vga_state.vga_graphics_ram[i] = 0;\r
- }\r
- else if ((ap=vga_state.vga_alpha_ram) != NULL) {\r
- unsigned int i,im;\r
-\r
- im = (FP_SEG(vga_state.vga_alpha_ram_fence) - FP_SEG(vga_state.vga_alpha_ram));\r
- if (im > 0x7FE) im = 0x7FE;\r
- im <<= 4 - 1; /* because ptr is type uint16_t */\r
- for (i=0;i < im;i++) vga_state.vga_alpha_ram[i] = 0x0720;\r
- }\r
- else {\r
- printf("WARNING: bios cls no ptr\n");\r
- }\r
-}\r
-\r
void modexprintmeminfo(video_t *v)\r
{\r
byte i;\r
{\r
printf(" [%u]=", i);\r
printf("(%Fp)", (v->page[i].data));\r
- printf(" size=%u", v->page[i].pagesize);\r
- printf(" sw=%lu sh=%lu ", (unsigned long)v->page[i].sw, (unsigned long)v->page[i].sh);\r
- printf(" width=%lu height=%lu", (unsigned long)v->page[i].width, (unsigned long)v->page[i].height);\r
+ printf(" size=%u ", v->page[i].pagesize);\r
+ printf("w=%lu h=%lu ", (unsigned long)v->page[i].width, (unsigned long)v->page[i].height);\r
+ printf("sw=%lu sh=%lu ", (unsigned long)v->page[i].sw, (unsigned long)v->page[i].sh);\r
+ printf("pi=%u", v->page[i].pi);\r
printf("\n");\r
}\r
}\r
-\r
-void update_state_from_vga_() {\r
- unsigned char c;\r
-\r
- vga_state.vga_pos_x = 0;\r
- vga_state.vga_pos_y = 0;\r
- vga_state.vga_stride = 80;\r
- vga_state.vga_height = 25;\r
- vga_state.vga_width = 80;\r
- vga_state.vga_9wide = 0;\r
-\r
- if (vga_state.vga_flags & VGA_IS_VGA) { /* VGA only. EGA cards DO have the misc. output reg but it's write-only */\r
- /* update state from H/W which I/O port */\r
- c = inp(0x3CC);\r
- if (c & 1) {\r
- vga_state.vga_base_3x0 = 0x3D0;\r
- }\r
- else {\r
- vga_state.vga_base_3x0 = 0x3B0;\r
- }\r
-\r
- /* now ask the graphics controller where/how VGA memory is mapped */\r
- c = vga_read_GC(6);\r
- /* bit 0 = alpha disable (if set, graphics) */\r
- vga_state.vga_alpha_mode = ((c & 1) == 0);\r
- /* bits 2-3 memory map select */\r
- update_state_vga_memory_map_select((c>>2)&3);\r
-\r
- /* read the sequencer: are we in 8 or 9 dot mode? */\r
- c = vga_read_sequencer(0x1);\r
- vga_state.vga_9wide = (c & 1) == 0;\r
-\r
- /* read from the CRTC controller the stride, width, and height */\r
- vga_state.vga_stride = vga_read_CRTC(0x13) * 2; /* "offset" register */\r
- if (vga_state.vga_alpha_mode) {\r
- vga_state.vga_width = vga_state.vga_stride;\r
- vga_sync_hw_cursor();\r
- /* TODO: read vertical blank values and calculate active area, then divide by scan line height, to get alpha height */\r
- /* TODO: read horizontal blank values to calculate active area, then visible width */\r
- }\r
- else {\r
- /* TODO: similar semantics for graphics mode */\r
- }\r
- }\r
- else if (vga_state.vga_flags & VGA_IS_EGA) {\r
- /* Well the EGA has similar registers BUT they aren't readable. So we have to\r
- * guess based on other information handed to us */\r
-\r
- /* reading the misc. output register doesn't work, use BIOS data area */\r
- c = *((unsigned char far*)MK_FP(0x40,0x63));\r
- if ((c&0xF0) == 0xD0)\r
- vga_state.vga_base_3x0 = 0x3D0;\r
- else if ((c&0xF0) == 0xB0)\r
- vga_state.vga_base_3x0 = 0x3B0;\r
- else {\r
- vga_state.vga_base_3x0 = 0x3D0;\r
- }\r
-\r
- /* reading from the graphics controller (0x3CE) doesn't work, deduce from BIOS mode */\r
- c = int10_getmode();\r
- switch (c) {\r
- case 0: case 1: case 2: case 3: case 7:\r
- vga_state.vga_alpha_mode = 1;\r
-\r
- /* the best we can do is assume B0000 if CRTC is at 3Bx or B8000 if at 3Dx even though it's possible to map at B8000 and 3Bx */\r
- if (vga_state.vga_base_3x0 == 0x3B0)\r
- update_state_vga_memory_map_select(2);\r
- else\r
- update_state_vga_memory_map_select(3);\r
- break;\r
- case 4: case 5: case 6:\r
- vga_state.vga_alpha_mode = 0;\r
- update_state_vga_memory_map_select(3);\r
- break;\r
- case 13: case 14: case 15: case 16: case 17: case 18: default:\r
- vga_state.vga_alpha_mode = 0;\r
- update_state_vga_memory_map_select(1);\r
- break;\r
- }\r
-\r
- /* read from the CRTC controller the stride, width, and height */\r
- vga_state.vga_stride = vga_read_CRTC(0x13) * 2; /* "offset" register */\r
- if (vga_state.vga_alpha_mode) {\r
- vga_state.vga_width = vga_state.vga_stride;\r
- vga_sync_hw_cursor();\r
- /* TODO: read vertical blank values and calculate active area, then divide by scan line height, to get alpha height */\r
- /* TODO: read horizontal blank values to calculate active area, then visible width */\r
- }\r
- else {\r
- /* TODO: similar semantics for graphics mode */\r
- }\r
- }\r
- else if (vga_state.vga_flags & VGA_IS_CGA) {\r
- vga_state.vga_base_3x0 = 0x3D0; /* always at 0x3Dx */\r
-\r
- /* TODO: If Tandy, detect state */\r
-\r
- /* read the status register to determine the state of the CGA... oh wait... we can't.\r
- * fine. deduce it from the BIOS video mode. */\r
- c = int10_getmode();\r
- switch (c) {\r
- case 0: case 1: case 2: case 3: case 7:\r
- vga_state.vga_alpha_mode = 1;\r
- break;\r
- default:\r
- vga_state.vga_alpha_mode = 0;\r
- break;\r
- }\r
-\r
- if (c <= 1) {\r
- vga_state.vga_stride = 40;\r
- vga_state.vga_width = 40;\r
- }\r
-\r
- update_state_vga_memory_map_select(3); /* 0xB8000 */\r
- }\r
- else if (vga_state.vga_flags & VGA_IS_MDA) {\r
- vga_state.vga_base_3x0 = 0x3B0; /* always at 0x3Bx */\r
- vga_state.vga_alpha_mode = 1; /* stock MDA doesn't have graphics */\r
-\r
- /* Hercules MDA: It would be nice to be able to read bit 2 of the display control,\r
- * except that the port is write-only. Thanks >:( */\r
- update_state_vga_memory_map_select(2); /* 0xB0000 */\r
- }\r
-\r
- vga_state.vga_draw_stride_limit = vga_state.vga_draw_stride = vga_state.vga_stride;\r
-}\r
projects / 16.git / blobdiff