wwww

[16.git] / src / lib / modex16.c

diff --git a/src/lib/modex16.c b/src/lib/modex16.c
index cb5102c8077c32d55f79c065f1bcb896cc386dbb..ea61e718c3cc916a476a081539b8818235bd4e1b 100755 (executable)
--- a/src/lib/modex16.c
+++ b/src/lib/modex16.c
@@ -56,7 +56,7 @@ void VGAmodeX(sword vq, global_game_variables_t *gv)
                int86(0x10, &in, &out);\r
                gv->old_mode = out.h.al;\r
                // enter mode\r
-               modexEnter();\r
+               modex__320x240_256__Enter(gv);\r
        }\r
 }\r
 \r
@@ -70,58 +70,80 @@ vgaSetMode(byte mode)
   int86(VIDEO_INT, &regs, &regs);\r
 }\r
 \r
-\r
 /* -========================= Entry  Points ==========================- */\r
 void\r
-modexEnter() {\r
-    word i;\r
-    dword far*ptr=(dword far*)VGA;      /* used for faster screen clearing */\r
-    word CRTParms[] = {\r
-        0x0d06,         /* vertical total */\r
-        0x3e07,         /* overflow (bit 8 of vertical counts) */\r
-        0x4109,         /* cell height (2 to double-scan */\r
-        0xea10,         /* v sync start */\r
-        0xac11,         /* v sync end and protect cr0-cr7 */\r
-        0xdf12,         /* vertical displayed */\r
-//             0x2013,         /* offset/logical width */\r
-        0x0014,         /* turn off dword mode */\r
-        0xe715,         /* v blank start */\r
-        0x0616,         /* v blank end */\r
-        0xe317          /* turn on byte mode */\r
-    };\r
-    int CRTParmCount = sizeof(CRTParms) / sizeof(CRTParms[0]);\r
-\r
-    /* TODO save current video mode and palette */\r
-    vgaSetMode(VGA_256_COLOR_MODE);\r
-\r
-    /* disable chain4 mode */\r
-    outpw(SC_INDEX, 0x0604);\r
-\r
-    /* synchronous reset while setting Misc Output */\r
-    outpw(SC_INDEX, 0x0100);\r
-\r
-    /* select 25 MHz dot clock & 60 Hz scanning rate */\r
-    outp(MISC_OUTPUT, 0xe3);\r
-\r
-    /* undo reset (restart sequencer) */\r
-    outpw(SC_INDEX, 0x0300);\r
-\r
-    /* reprogram the CRT controller */\r
-    outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
-    outp(CRTC_DATA, 0x7f);  /* get current write protect on varios regs */\r
-\r
-    /* send the CRTParms */\r
-    for(i=0; i<CRTParmCount; i++) {\r
-        outpw(CRTC_INDEX, CRTParms[i]);\r
-    }\r
+modex__320x240_256__Enter(global_game_variables_t *gv)\r
+{\r
+       word i;\r
+       dword far*ptr=(dword far*)VGA;      /* used for faster screen clearing */\r
+       word CRTParms[] = {\r
+//             0xe300,         /* horizontal total */\r
+               0x4f01,         /* horizontal display enable end */\r
+               0x5002,         /*  */\r
+               0x5404,         /*  */\r
+               0x8005,         /*  */\r
+               0x0d06,         /* vertical total */\r
+               0x3e07,         /* overflow (bit 8 of vertical counts) */\r
+               0x4109,         /* cell height (2 to double-scan */\r
+               0xea10,         /* v sync start */\r
+               0xac11,         /* v sync end and protect cr0-cr7 */\r
+               0xdf12,         /* vertical displayed */\r
+               0x2813,         /* offset/logical width */\r
+               0x0014,         /* turn off dword mode */\r
+               0xe715,         /* v blank start */\r
+               0x0616,         /* v blank end */\r
+               0xe317          /* turn on byte mode */\r
+       };\r
+\r
+       int CRTParmCount = sizeof(CRTParms) / sizeof(CRTParms[0]);\r
+       /* width and height */\r
+       //TODO WWWW\r
+\r
+       /* disable chain4 mode */\r
+       outpw(SC_INDEX, 0x0604);\r
+\r
+       /* synchronous reset while setting Misc Output */\r
+       outpw(SC_INDEX, 0x0100);\r
+\r
+       /* select 25 MHz dot clock & 60 Hz scanning rate */\r
+       outp(MISC_OUTPUT, 0xe3);\r
+\r
+       /* undo reset (restart sequencer) */\r
+       outpw(SC_INDEX, 0x0300);\r
+\r
+       /* reprogram the CRT controller */\r
+       outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
+       outp(CRTC_DATA, 0x7f);  /* get current write protect on varios regs */\r
+\r
+       /* send the CRTParms */\r
+       for(i=0; i<CRTParmCount; i++) {\r
+               outpw(CRTC_INDEX, CRTParms[i]);\r
+       }\r
 \r
-    /* clear video memory */\r
-    outpw(SC_INDEX, 0x0f02);\r
-    for(i=0; i<0x8000; i++) {\r
-        ptr[i] = 0x0000;\r
-    }\r
+       /* clear video memory */\r
+       outpw(SC_INDEX, 0x0f02);\r
+       for(i=0; i<0x8000; i++) {\r
+               ptr[i] = 0x0000;\r
+       }\r
 }\r
 \r
+//    setBaseXMode() does the initialization to make the VGA ready to\r
+//    accept any combination of configuration register settings.  This\r
+//    involves enabling writes to index 0 to 7 of the CRT controller (port\r
+//    0x3D4), by clearing the most significant bit (bit 7) of index 0x11.\r
+void\r
+modexsetBaseXMode(void)\r
+{\r
+       int temp;\r
+\r
+       /* TODO save current video mode and palette */\r
+       vgaSetMode(VGA_256_COLOR_MODE);\r
+\r
+       outp(CRTC_INDEX, 0x11);\r
+       temp = inp(CRTC_DATA) & 0x7F;\r
+       outp(CRTC_INDEX, 0x11);\r
+       outp(CRTC_DATA, temp);\r
+}\r
 \r
 void\r
 modexLeave() {\r