]> 4ch.mooo.com Git - 16.git/commitdiff
what is going on\!?\!? PNGWEN JONCAMPBELL321 PLEASE HELP\!\! wwww
authorsparky4 <sparky4@cock.li>
Mon, 6 Jun 2016 13:10:53 +0000 (08:10 -0500)
committersparky4 <sparky4@cock.li>
Mon, 6 Jun 2016 13:10:53 +0000 (08:10 -0500)
pcx2vrl
pcxsscut
src/lib/modex16.c
src/lib/modex16.h
vrl2vrs
vrsdump

diff --git a/pcx2vrl b/pcx2vrl
index 3d9ac6e6d0e4fe19bb8f1962de5fd02253dea7be..bd947e55158b82b4f9d900234745aca806cde60e 100755 (executable)
Binary files a/pcx2vrl and b/pcx2vrl differ
index d743ac3b8ac58a73b3cb2380e2367aee9b167169..1deec74dc0487422bfdb03acb381df671e83a049 100755 (executable)
Binary files a/pcxsscut and b/pcxsscut differ
index 1f1e303bcec3cdbd7d82d419e5ab2a293b73c365..38db05d8c2f12bbd57b57a6887765d2f0001c26d 100755 (executable)
@@ -91,7 +91,7 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
        vgaSetMode(VGA_256_COLOR_MODE);\r
        vga_enable_256color_modex();\r
 \r
-       update_state_from_vga_();\r
+       update_state_from_vga();\r
        vga_read_crtc_mode(&cm);\r
 \r
        /* reprogram the CRT controller */\r
@@ -1178,130 +1178,3 @@ void modexprintmeminfo(video_t *v)
                printf("\n");\r
        }\r
 }\r
-\r
-void update_state_from_vga_() {\r
-       unsigned char c;\r
-\r
-       vga_state.vga_pos_x = 0;\r
-       vga_state.vga_pos_y = 0;\r
-       vga_state.vga_stride = 80;\r
-       vga_state.vga_height = 25;\r
-       vga_state.vga_width = 80;\r
-       vga_state.vga_9wide = 1;\r
-\r
-       if (vga_state.vga_flags & VGA_IS_VGA) { /* VGA only. EGA cards DO have the misc. output reg but it's write-only */\r
-               /* update state from H/W which I/O port */\r
-               c = inp(0x3CC);\r
-               if (c & 1) {\r
-                       vga_state.vga_base_3x0 = 0x3D0;\r
-               }\r
-               else {\r
-                       vga_state.vga_base_3x0 = 0x3B0;\r
-               }\r
-\r
-               /* now ask the graphics controller where/how VGA memory is mapped */\r
-               c = vga_read_GC(6);\r
-               /* bit 0 = alpha disable (if set, graphics) */\r
-               vga_state.vga_alpha_mode = ((c & 1) == 0);\r
-               /* bits 2-3 memory map select */\r
-               update_state_vga_memory_map_select((c>>2)&3);\r
-\r
-               /* read the sequencer: are we in 8 or 9 dot mode? */\r
-               c = vga_read_sequencer(0x1);\r
-               vga_state.vga_9wide = (c & 1) == 0;\r
-\r
-               /* read from the CRTC controller the stride, width, and height */\r
-               vga_state.vga_stride = vga_read_CRTC(0x13) * 2; /* "offset" register */\r
-               if (vga_state.vga_alpha_mode) {\r
-                       vga_state.vga_width = vga_state.vga_stride;\r
-                       vga_sync_hw_cursor();\r
-                       /* TODO: read vertical blank values and calculate active area, then divide by scan line height, to get alpha height */\r
-                       /* TODO: read horizontal blank values to calculate active area, then visible width */\r
-               }\r
-               else {\r
-                       /* TODO: similar semantics for graphics mode */\r
-               }\r
-       }\r
-       else if (vga_state.vga_flags & VGA_IS_EGA) {\r
-               /* Well the EGA has similar registers BUT they aren't readable. So we have to\r
-                * guess based on other information handed to us */\r
-\r
-               /* reading the misc. output register doesn't work, use BIOS data area */\r
-               c = *((unsigned char far*)MK_FP(0x40,0x63));\r
-               if ((c&0xF0) == 0xD0)\r
-                       vga_state.vga_base_3x0 = 0x3D0;\r
-               else if ((c&0xF0) == 0xB0)\r
-                       vga_state.vga_base_3x0 = 0x3B0;\r
-               else {\r
-                       vga_state.vga_base_3x0 = 0x3D0;\r
-               }\r
-\r
-               /* reading from the graphics controller (0x3CE) doesn't work, deduce from BIOS mode */\r
-               c = int10_getmode();\r
-               switch (c) {\r
-                       case 0: case 1: case 2: case 3: case 7:\r
-                               vga_state.vga_alpha_mode = 1;\r
-\r
- /* the best we can do is assume B0000 if CRTC is at 3Bx or B8000 if at 3Dx even though it's possible to map at B8000 and 3Bx */\r
-                               if (vga_state.vga_base_3x0 == 0x3B0)\r
-                                       update_state_vga_memory_map_select(2);\r
-                               else\r
-                                       update_state_vga_memory_map_select(3);\r
-                               break;\r
-                       case 4: case 5: case 6:\r
-                               vga_state.vga_alpha_mode = 0;\r
-                               update_state_vga_memory_map_select(3);\r
-                               break;\r
-                       case 13: case 14: case 15: case 16: case 17: case 18: default:\r
-                               vga_state.vga_alpha_mode = 0;\r
-                               update_state_vga_memory_map_select(1);\r
-                               break;\r
-               }\r
-\r
-               /* read from the CRTC controller the stride, width, and height */\r
-               vga_state.vga_stride = vga_read_CRTC(0x13) * 2; /* "offset" register */\r
-               if (vga_state.vga_alpha_mode) {\r
-                       vga_state.vga_width = vga_state.vga_stride;\r
-                       vga_sync_hw_cursor();\r
-                       /* TODO: read vertical blank values and calculate active area, then divide by scan line height, to get alpha height */\r
-                       /* TODO: read horizontal blank values to calculate active area, then visible width */\r
-               }\r
-               else {\r
-                       /* TODO: similar semantics for graphics mode */\r
-               }\r
-       }\r
-       else if (vga_state.vga_flags & VGA_IS_CGA) {\r
-               vga_state.vga_base_3x0 = 0x3D0; /* always at 0x3Dx */\r
-\r
-               /* TODO: If Tandy, detect state */\r
-\r
-               /* read the status register to determine the state of the CGA... oh wait... we can't.\r
-                * fine. deduce it from the BIOS video mode. */\r
-               c = int10_getmode();\r
-               switch (c) {\r
-                       case 0: case 1: case 2: case 3: case 7:\r
-                               vga_state.vga_alpha_mode = 1;\r
-                               break;\r
-                       default:\r
-                               vga_state.vga_alpha_mode = 0;\r
-                               break;\r
-               }\r
-\r
-               if (c <= 1) {\r
-                       vga_state.vga_stride = 40;\r
-                       vga_state.vga_width = 40;\r
-               }\r
-\r
-               update_state_vga_memory_map_select(3); /* 0xB8000 */\r
-       }\r
-       else if (vga_state.vga_flags & VGA_IS_MDA) {\r
-               vga_state.vga_base_3x0 = 0x3B0; /* always at 0x3Bx */\r
-               vga_state.vga_alpha_mode = 1; /* stock MDA doesn't have graphics */\r
-\r
-               /* Hercules MDA: It would be nice to be able to read bit 2 of the display control,\r
-                *               except that the port is write-only. Thanks >:( */\r
-               update_state_vga_memory_map_select(2); /* 0xB0000 */\r
-       }\r
-\r
-       vga_state.vga_draw_stride_limit = vga_state.vga_draw_stride = vga_state.vga_stride;\r
-}\r
index 9ce226e1fccf726c1a4ccf137890bc6dd179fc0e..0b30850dc0ba5ed260dc9ef06d13b6ec30a68368 100755 (executable)
@@ -186,6 +186,5 @@ void modexcls(page_t *page, byte color, byte *Where);
 void modexWaitBorder();
 void bios_cls();
 void modexprintmeminfo(video_t *v);
-void update_state_from_vga_();
 
 #endif
diff --git a/vrl2vrs b/vrl2vrs
index acdd4bda2f0dd8772cdce97a19b6c906e4e09f8e..b67956b7baa37941b88ad79da1a2ff49c0c435a0 100755 (executable)
Binary files a/vrl2vrs and b/vrl2vrs differ
diff --git a/vrsdump b/vrsdump
index 8ba0497deb819d75caeef21a3a0d4086b394845b..dbaba30e42b8639969d3bdd4433243eb338adcbe 100755 (executable)
Binary files a/vrsdump and b/vrsdump differ