]> 4ch.mooo.com Git - 16.git/commitdiff
test.exe shows that the overscan is showing up where it should not thus end horizonta...
authorsparky4 <sparky4@cock.li>
Fri, 3 Jun 2016 17:28:07 +0000 (12:28 -0500)
committersparky4 <sparky4@cock.li>
Fri, 3 Jun 2016 17:28:07 +0000 (12:28 -0500)
TEST.L16 [new file with mode: 0755]
pcx2vrl
pcxsscut
src/lib/modex16.c
src/lib/modex16.h
src/scroll.c
src/test.c
vrl2vrs
vrsdump

diff --git a/TEST.L16 b/TEST.L16
new file mode 100755 (executable)
index 0000000..0cad3f6
--- /dev/null
+++ b/TEST.L16
@@ -0,0 +1,9 @@
+WARNING: Failed to initialize DEBUG output\r
+Project 16 test.exe. This is just a test file!\r
+version Jun  3 2016 12:00:56\r
+video memory remaining: 65535\r
+page   [0]=(a000:0000) size=23936 sw=320  sh=240  width=352  height=272\r
+       [1]=(a000:5d80) size=23936 sw=320  sh=240  width=352  height=272\r
+       [2]=(a000:bb00) size=1024 sw=64  sh=64  width=64  height=64\r
+       [3]=(a000:bf00) size=16640 sw=320  sh=208  width=320  height=208\r
+tx=2   ty=0    player.d=2\r
diff --git a/pcx2vrl b/pcx2vrl
index 3d9ac6e6d0e4fe19bb8f1962de5fd02253dea7be..bd947e55158b82b4f9d900234745aca806cde60e 100755 (executable)
Binary files a/pcx2vrl and b/pcx2vrl differ
index d743ac3b8ac58a73b3cb2380e2367aee9b167169..1deec74dc0487422bfdb03acb381df671e83a049 100755 (executable)
Binary files a/pcxsscut and b/pcxsscut differ
index 157e5fc4b023ff12d955d0b5840d61a5c05b86f6..62f5c4ef547aac9c64b767a742c53912e624cb19 100755 (executable)
@@ -92,11 +92,11 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
        vga_enable_256color_modex();\r
 \r
        update_state_from_vga();\r
-       vga_read_crtc_mode(&cm);\r
+       vga_read_crtc_mode_(&cm);\r
 \r
        /* reprogram the CRT controller */\r
-       outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
-       outp(CRTC_DATA, 0x7f);  /* get current write protect on varios regs */\r
+       //outp(CRTC_INDEX, 0x11); /* VSync End reg contains register write prot */\r
+       //outp(CRTC_DATA, 0x7f);  /* get current write protect on varios regs */\r
 \r
        switch(vq)\r
        {\r
@@ -119,7 +119,7 @@ void modexEnter(sword vq, boolean cmem, global_game_variables_t *gv)
                        cm.horizontal_total=0x5f + 5; /* CRTC[0]             -5 */\r
                        cm.horizontal_display_end=0x4f + 1; /* CRTC[1]       -1 */\r
                        cm.horizontal_blank_start=0x50 + 1; /* CRTC[2] */\r
-                       //cm.horizontal_blank_end=0x82 + 1;   /* CRTC[3] bit 0-4 & CRTC[5] bit 7 */\r
+                       //cm.horizontal_blank_end=0x82 + 1;   /* CRTC[3] bit 0-4 & CRTC[5] bit 7 *///skewing ^^;\r
                        cm.horizontal_start_retrace=0x54;/* CRTC[4] */\r
                        cm.horizontal_end_retrace=0x80; /* CRTC[5] bit 0-4 */\r
                        //cm.horizontal_start_delay_after_total=0x3e; /* CRTC[3] bit 5-6 */\r
@@ -837,7 +837,7 @@ modexPalUpdate0(byte *p)
 }\r
 \r
 void\r
-modexPalOverscan(byte *p, word col)\r
+modexPalOverscan(word col)\r
 {\r
        //modexWaitBorder();\r
        vga_wait_for_vsync();\r
@@ -1178,3 +1178,152 @@ void modexprintmeminfo(video_t *v)
                printf("\n");\r
        }\r
 }\r
+\r
+void vga_write_crtc_mode_(struct vga_mode_params *p,unsigned int flags) {\r
+       unsigned char c,c2,syncreset=0;\r
+\r
+       if (!(vga_state.vga_flags & VGA_IS_VGA))\r
+               return;\r
+\r
+       /* sync disable unless told not to */\r
+       if (!(flags & VGA_WRITE_CRTC_MODE_NO_CLEAR_SYNC)) {\r
+               c = vga_read_CRTC(0x17);\r
+               vga_write_CRTC(0x17,c&0x7F);\r
+       }\r
+\r
+       c = inp(0x3CC); /* misc out reg */\r
+       /* if changing the clock select bits then we need to do a reset of the sequencer */\r
+       if (p->clock_select != ((c >> 2) & 3)) syncreset=1;\r
+       /* proceed to change bits */\r
+       c &= ~((3 << 2) | (1 << 6) | (1 << 7));\r
+       c |= (p->clock_select&3) << 2;\r
+       c |= p->hsync_neg << 6;\r
+       c |= p->vsync_neg << 7;\r
+       if (syncreset) vga_write_sequencer(0,0x01/*SR=0 AR=1 start synchronous reset*/);\r
+       outp(0x3C2,c); /* misc out */\r
+       if (syncreset) vga_write_sequencer(0,0x03/*SR=1 AR=1 restart sequencer*/);\r
+\r
+       vga_write_sequencer(1,\r
+               (p->shift_load_rate << 2) |\r
+               (p->shift4_enable << 4) |\r
+               ((p->clock9 ^ 1) << 0) |\r
+               (p->clock_div2 << 3));\r
+\r
+       c = 0; /* use 'c' as overflow register */\r
+       c2 = vga_read_CRTC(0x09); /* read max scan line */\r
+       c2 &= ~(1 << 5); /* mask out start vertical blank bit 9 */\r
+       vga_write_CRTC(0x11, /* NTS: we leave bit 7 (protect) == 0 so we can program regs 0-7 in this routine */\r
+               (((p->refresh_cycles_per_scanline == 5) ? 1 : 0) << 6) |\r
+               (p->vertical_end_retrace & 0xF));\r
+       vga_write_CRTC(0x06,(p->vertical_total - 2));\r
+               c |= (((p->vertical_total - 2) >> 8) & 1) << 0;\r
+               c |= (((p->vertical_total - 2) >> 9) & 1) << 5;\r
+       vga_write_CRTC(0x10,p->vertical_start_retrace);\r
+               c |= ((p->vertical_start_retrace >> 8) & 1) << 2;\r
+               c |= ((p->vertical_start_retrace >> 9) & 1) << 7;\r
+       vga_write_CRTC(0x12,p->vertical_display_end - 1);\r
+               c |= (((p->vertical_display_end - 1) >> 8) & 1) << 1;\r
+               c |= (((p->vertical_display_end - 1) >> 9) & 1) << 6;\r
+       vga_write_CRTC(0x15,p->vertical_blank_start - 1);\r
+               c |= (((p->vertical_blank_start - 1) >> 8) & 1) << 3;\r
+               c2|= (((p->vertical_blank_start - 1) >> 9) & 1) << 5;\r
+\r
+       /* NTS: this field is 7 bits wide but "Some SVGA chipsets use all 8" as VGADOC says. */\r
+       /*      writing it in this way resolves the partial/full screen blanking problems with Intel 855/915/945 chipsets */\r
+       vga_write_CRTC(0x16,p->vertical_blank_end - 1);\r
+\r
+       vga_write_CRTC(0x14, /* NTS we write "underline location == 0" */\r
+               (p->dword_mode << 6) |\r
+               (p->inc_mem_addr_only_every_4th << 5));\r
+       vga_write_CRTC(0x07,c); /* overflow reg */\r
+\r
+       c2 &= ~(0x9F);  /* mask out SD + Max scanline */\r
+       c2 |= (p->scan_double << 7);\r
+       c2 |= (p->max_scanline - 1) & 0x1F;\r
+       vga_write_CRTC(0x09,c2);\r
+       vga_write_CRTC(0x13,p->offset);\r
+       vga_write_CRTC(0,(p->horizontal_total - 5));\r
+       vga_write_CRTC(1,(p->horizontal_display_end - 1));\r
+       vga_write_CRTC(2,p->horizontal_blank_start - 1);\r
+       vga_write_CRTC(3,((p->horizontal_blank_end - 1) & 0x1F) | (p->horizontal_start_delay_after_total << 5) | 0x80);\r
+       vga_write_CRTC(4,p->horizontal_start_retrace);\r
+       vga_write_CRTC(5,((((p->horizontal_blank_end - 1) >> 5) & 1) << 7) | (p->horizontal_start_delay_after_retrace << 5) |\r
+               (p->horizontal_end_retrace & 0x1F));\r
+\r
+       /* finish by writing reg 0x17 which also enables sync */\r
+       vga_write_CRTC(0x17,\r
+               (p->sync_enable << 7) |\r
+               (vga_read_CRTC(0x17) & 0x10) | /* NTS: one undocumented bit, perhaps best not to change it */\r
+               ((p->word_mode^1) << 6) |\r
+               (p->address_wrap_select << 5) |\r
+               (p->memaddr_div2 << 3) |\r
+               (p->scanline_div2 << 2) |\r
+               ((p->map14 ^ 1) << 1) |\r
+               ((p->map13 ^ 1) << 0));\r
+\r
+       /* reinforce write protect */\r
+       c = vga_read_CRTC(0x11);\r
+       vga_write_CRTC(0x11,c|0x80);\r
+}\r
+\r
+void vga_read_crtc_mode_(struct vga_mode_params *p) {\r
+       unsigned char c,c2;\r
+\r
+       if (!(vga_state.vga_flags & VGA_IS_VGA))\r
+               return;\r
+\r
+       c = inp(0x3CC); /* misc out reg */\r
+       p->clock_select = (c >> 2) & 3;\r
+       p->hsync_neg = (c >> 6) & 1;\r
+       p->vsync_neg = (c >> 7) & 1;\r
+\r
+       c = vga_read_sequencer(1);\r
+       p->clock9 = (c & 1) ^ 1;\r
+       p->clock_div2 = (c >> 3) & 1;\r
+       p->shift4_enable = (c >> 4) & 1;\r
+       p->shift_load_rate = (c >> 2) & 1;\r
+\r
+       p->sync_enable = (vga_read_CRTC(0x17) >> 7) & 1;\r
+       p->word_mode = ((vga_read_CRTC(0x17) >> 6) & 1) ^ 1;\r
+       p->address_wrap_select = (vga_read_CRTC(0x17) >> 5) & 1;\r
+       p->memaddr_div2 = (vga_read_CRTC(0x17) >> 3) & 1;\r
+       p->scanline_div2 = (vga_read_CRTC(0x17) >> 2) & 1;\r
+       p->map14 = ((vga_read_CRTC(0x17) >> 1) & 1) ^ 1;\r
+       p->map13 = ((vga_read_CRTC(0x17) >> 0) & 1) ^ 1;\r
+\r
+       p->dword_mode = (vga_read_CRTC(0x14) >> 6) & 1;\r
+       p->horizontal_total = vga_read_CRTC(0) + 5;\r
+       p->horizontal_display_end = vga_read_CRTC(1);// + 1;\r
+       p->horizontal_blank_start = vga_read_CRTC(2) + 1;\r
+       p->horizontal_blank_end = ((vga_read_CRTC(3) & 0x1F) | ((vga_read_CRTC(5) >> 7) << 5) |\r
+               ((p->horizontal_blank_start - 1) & (~0x3F))) + 1;\r
+       if (p->horizontal_blank_start >= p->horizontal_blank_end)\r
+               p->horizontal_blank_end += 0x40;\r
+       p->horizontal_start_retrace = vga_read_CRTC(4);\r
+       p->horizontal_end_retrace = (vga_read_CRTC(5) & 0x1F) |\r
+               (p->horizontal_start_retrace & (~0x1F));\r
+       if ((p->horizontal_start_retrace&0x1F) >= (p->horizontal_end_retrace&0x1F))\r
+               p->horizontal_end_retrace += 0x20;\r
+       p->horizontal_start_delay_after_total = (vga_read_CRTC(3) >> 5) & 3;\r
+       p->horizontal_start_delay_after_retrace = (vga_read_CRTC(5) >> 5) & 3;\r
+\r
+       c = vga_read_CRTC(7); /* c = overflow reg */\r
+       c2 = vga_read_CRTC(9);\r
+\r
+       p->scan_double = (c2 >> 7) & 1;\r
+       p->max_scanline = (c2 & 0x1F) + 1;\r
+       p->offset = vga_read_CRTC(0x13);\r
+       p->vertical_total = (vga_read_CRTC(6) | ((c & 1) << 8) | (((c >> 5) & 1) << 9)) + 2;\r
+       p->vertical_start_retrace = (vga_read_CRTC(0x10) | (((c >> 2) & 1) << 8) | (((c >> 7) & 1) << 9));\r
+       p->vertical_end_retrace = (vga_read_CRTC(0x11) & 0xF) |\r
+               (p->vertical_start_retrace & (~0xF));\r
+       if ((p->vertical_start_retrace&0xF) >= (p->vertical_end_retrace&0xF))\r
+               p->vertical_end_retrace += 0x10;\r
+       p->refresh_cycles_per_scanline = ((vga_read_CRTC(0x11) >> 6) & 1) ? 5 : 3;\r
+       p->inc_mem_addr_only_every_4th = (vga_read_CRTC(0x14) >> 5) & 1;\r
+       p->vertical_display_end = ((vga_read_CRTC(0x12) | (((c >> 1) & 1) << 8) | (((c >> 6) & 1) << 9))) + 1;\r
+       p->vertical_blank_start = ((vga_read_CRTC(0x15) | (((c >> 3) & 1) << 8) | (((c2 >> 5) & 1) << 9))) + 1;\r
+       p->vertical_blank_end = ((vga_read_CRTC(0x16) & 0x7F) | ((p->vertical_blank_start - 1) & (~0x7F))) + 1;\r
+       if (p->vertical_blank_start >= p->vertical_blank_end)\r
+               p->vertical_blank_end += 0x80;\r
+}\r
index 3ba8753cc1f610978bac97e4ef8d07cdf2de3d8f..c33d26d116e5b350e4f60f275aebb8e1a55d2dec 100755 (executable)
@@ -148,7 +148,7 @@ void modexPalWhite();
 void modexPalUpdate(bitmap_t *bmp, word *i, word qp, word aqoffset);
 void modexPalUpdate1(byte *p);
 void modexPalUpdate0(byte *p);
-void modexPalOverscan(byte *p, word col);
+void modexPalOverscan(word col);
 void modexchkcolor(bitmap_t *bmp, word *q, word *a, word *aa, word *z, word *i/*, word *offset*/);
 void modexputPixel(page_t *page, int x, int y, byte color);
 byte modexgetPixel(page_t *page, int x, int y);
@@ -186,5 +186,7 @@ void modexcls(page_t *page, byte color, byte *Where);
 void modexWaitBorder();
 void bios_cls();
 void modexprintmeminfo(video_t *v);
+void vga_write_crtc_mode_(struct vga_mode_params *p,unsigned int flags);
+void vga_read_crtc_mode_(struct vga_mode_params *p);
 
 #endif
index 6d6f07232f716194f8c21ef577eb307afd0c4bc1..90a3ba3f1d077224ca9666e27f0ea9179563b88d 100755 (executable)
@@ -283,8 +283,8 @@ void main(int argc, char *argv[])
        }*/
 
        //9
-       if(IN_KeyDown(10)){ modexPalOverscan(default_pal, rand()%56); modexPalUpdate1(default_pal); IN_UserInput(1,1); }
-       //if(IN_KeyDown(11)){ modexPalOverscan(default_pal, 15); }
+       if(IN_KeyDown(10)){ modexPalOverscan(rand()%56); modexPalUpdate1(default_pal); IN_UserInput(1,1); }
+       //if(IN_KeyDown(11)){ modexPalOverscan(15); }
        if((player[0].q==1) && !(player[0].x%TILEWH==0 && player[0].y%TILEWH==0)) break;        //incase things go out of sync!
        }
 
index 74b84dce6a9e8d6263af62a49cb250d9b2d7b110..69d35d0483e66216c25345f92304db9bc5a7635c 100755 (executable)
@@ -24,6 +24,7 @@
 #include "src/lib/modex16.h"\r
 #include "src/lib/16_in.h"\r
 #include "src/lib/scroll16.h"\r
+#include "src/lib/bakapee.h"\r
 \r
 global_game_variables_t gvar;\r
 player_t player[MaxPlayers];\r
@@ -38,11 +39,12 @@ void main(int argc, char *argv[])
        byte *pal, *pal2;\r
        sword bakapee;\r
 \r
+       word colo=LGQ;\r
+\r
        //argument\r
        if(argv[1]) bakapee = atoi(argv[1]);\r
        else bakapee = 1;\r
 \r
-\r
        // DOSLIB: check our environment\r
        probe_dos();\r
 \r
@@ -72,9 +74,6 @@ void main(int argc, char *argv[])
        _DEBUG("Serial debug output started\n"); // NTS: All serial output must end messages with newline, or DOSBox-X will not emit text to log\r
        _DEBUGF("Serial debug output printf test %u %u %u\n",1U,2U,3U);\r
 \r
-       /* load our palette */\r
-       modexLoadPalFile("data/default.pal", &pal2);\r
-\r
        /* save the palette */\r
        pal  = modexNewPal();\r
        modexPalSave(pal);\r
@@ -89,6 +88,12 @@ void main(int argc, char *argv[])
        VGAmodeX(bakapee, 1, &gvar);\r
        modexPalBlack();\r
 \r
+       /* load our palette */\r
+       modexLoadPalFile("data/default.pal", &pal2);\r
+\r
+       /* overscan show */\r
+       //modexPalOverscan(44+1);\r
+\r
        /* set up the page, but with 16 pixels on all borders in offscreen mem */\r
        modexHiganbanaPageSetup(&gvar.video);\r
        for(i=0;i<gvar.video.num_of_pages;i++)\r
@@ -179,6 +184,16 @@ void main(int argc, char *argv[])
                if(IN_KeyDown(2+1)){ pan.pn=1; }\r
                if(IN_KeyDown(3+1)){ pan.pn=2; }\r
                if(IN_KeyDown(4+1)){ pan.pn=3; }\r
+               if(IN_KeyDown(7)){\r
+                       for(i=0;i<3;i++)\r
+                       {\r
+                               pal2[i] = rand()%64;\r
+                               modexPalUpdate1(pal2);\r
+                               colo++;\r
+                               if(colo>HGQ) colo=LGQ;\r
+                       }\r
+//                     if(i>PAL_SIZE) i=0;\r
+               }//9\r
                if(IN_KeyDown(25)){\r
                        modexpdump(&gvar.video.page[pan.pn]);\r
                        IN_UserInput(1,1);\r
diff --git a/vrl2vrs b/vrl2vrs
index acdd4bda2f0dd8772cdce97a19b6c906e4e09f8e..b67956b7baa37941b88ad79da1a2ff49c0c435a0 100755 (executable)
Binary files a/vrl2vrs and b/vrl2vrs differ
diff --git a/vrsdump b/vrsdump
index 8ba0497deb819d75caeef21a3a0d4086b394845b..dbaba30e42b8639969d3bdd4433243eb338adcbe 100755 (executable)
Binary files a/vrsdump and b/vrsdump differ